Ampro Corporation XTX 820 manual PCI Express Interface J2, PCI Express/ExpressCards

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Chapter 3

Hardware

PCI Express Interface (J2)

The J2 connector has 100 pins and is used for PCI Express, Serial ATA (SATA), USB, ExpressCard, AC'97/HDA (High Definition Audio), and LPC bus.

PCI Express/ExpressCards

The I/O Hub (82801FBM) provides four x1 PCI Express lanes which can be configured to support PCI Express edge cards or two ExpressCards. If ExpressCards are used, one dedicated USB port and one dedicated PCI Express lane are required for each ExpressCard and SMBus is optional.

Table 3-9. PCI Express Interface Pin/Signal Descriptions (J2)

J2

Signal

Description

Pin #

 

 

69

PCIE0_RX-

PCI Express Lane 0, Receive Input, Negative Differential Line

 

 

 

71

PCIE0_RX+

PCI Express Lane 0, Receive Input, Positive Differential Line

75

PCIE0_TX-

PCI Express Lane 0, Transmit Output, Negative Differential Line

 

 

 

77

PCIE0_TX+

PCI Express Lane 0, Transmit Output, Positive Differential Line

 

 

 

53

PCIE1_RX-

PCI Express Lane 1, Receive Input, Negative Differential Line

55

PCIE1_RX+

PCI Express Lane 1, Receive Input, Positive Differential Line

 

 

 

59

PCIE1_TX-

PCI Express Lane 1, Transmit Output, Negative Differential Line

 

 

 

61

PCIE1_TX+

PCI Express Lane 1, Transmit Output, Positive Differential Line

39

PCIE2_RX-

PCI Express Lane 2, Receive Input, Negative Differential Line

 

 

 

37

PCIE2_RX+

PCI Express Lane 2, Receive Input, Positive Differential Line

 

 

 

33

PCIE2_TX-

PCI Express Lane 2, Transmit Output, Negative Differential Line

31

PCIE2_TX+

PCI Express Lane 2, Transmit Output, Positive Differential Line

 

 

 

17

PCIE3_RX-

PCI Express Lane 3, Receive Input, Negative Differential Line

 

 

 

15

PCIE3_RX+

PCI Express Lane 3, Receive Input, Positive Differential Line

11

PCIE3_TX-

PCI Express Lane 3, Transmit Output, Negative Differential Line

 

 

 

9

PCIE3_TX+

PCI Express Lane 3, Transmit Output, Positive Differential Line

 

 

 

5

PCIE_CLK_REF-

PCI Express Reference Clock, Negative Differential Line

3

PCIE_CLK_REF+

PCI Express Reference Clock, Positive Differential Line

 

 

 

41

EXC0_CPPE*

ExpressCard (capable card) Request (for slot 1)

 

 

 

43

EXC0_RST*

ExpressCard Reset Slot 1

21

EXC1_CPPE*

ExpressCard (capable card) Request (for slot 2)

 

 

 

23

EXC1_RST*

ExpressCard Reset (for slot 2)

 

 

 

63

PCE_WAKE*

PCI Express Wake Event

Notes: The shaded area denotes power or ground. The signals marked with * = Negative true logic.

XTX 820

Reference Manual

29

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Contents XTX Computer On Module Reference Manual Audience Assumptions Contents Index List of Figures List of Tables Reference Manual XTX Reference Material SpecificationsPurpose of this Manual XTX 820 Support Products Related Ampro ProductsOther Ampro Products Ampro XTX ProductsAmpro ETX Products Chapter ETX→ Concept and XTX Extension Chapter Product OverviewHardware Design Path Product DescriptionBoard Features Chapter Chapter COM1 COM2 Block DiagramGmhc Major Integrated Circuits ICsChip Type Mfg Model Description Function CPUSignals Description Connector DefinitionsDimension SpecificationsPhysical Specifications Mechanical SpecificationsParameter GHz ULV Celeron GHz LV Pentium M Characteristics Power SpecificationsEnvironmental Specifications Thermal/Cooling SolutionsOverview HardwareMemory CPU U1Size Memory MapAvailable Typical Interrupt Source Connected to Pin Address Range Decimal Hex0CFC 0CFF Address MapAddress Range Size Description Decimal Hex Address hex Size Available DescriptionPin # PCI Bus Interface Connector J1Signal PCI BusFrame GNTPME DevselAD6 GNDAD9 CBE0CBE2 CLKREQ CBE3CBE1 Serial Interrupt Request Signal Description Pin #J1 Pin # Signal Description Universal Serial Bus USBPin # Signal Description Serirq GNT0 VCC0 VCC1Reserved AoutrVCC2 VCC3VCC5 VCC4PCI Express/ExpressCards PCI Express Interface J2Additional Universal Serial Bus USB Ports Serial ATAExtended System Management LPC InterfaceFanpwmout PCIGNT#APCIREQ#A FantachoinEXC1RST# Fan tachometer input Floppy Port Signal 34-Pin Description Pin # CablePrimary I/O Interface J3 Parallel Port Signal DB25 Description Pin #Serial Ports 1 CTS2 Infrared IrDA PortPS/2 Keyboard PS/2 MouseVideo Engine Internal Graphics FeaturesVideo Interface CRT InterfaceLvds Interface J3 Pin # Signal Description TV Out Component and S-Video Comp Floppy Write Protect Senses the diskette is write protected MOT DRVIDE Ports IDE and Auxiliary Interface J4Cblidp PideiowPideior PiderdyActled Ethernet Port InterfaceTX+ LiledSpeaker Power Control SignalsPower Management Signals SMBus I2C Bus Real Time Clock RTC/BatteryMatrix Component Address Binary GPE1 I2DATGND2 GND4VCC6 GND5GND7 TXD GPE2RXD RXD+Sdvo Port MiscellaneousTemperature Monitoring Serial Console Remote AccessWatchdog Timer WDT Pwrok Power InputPower and Sleep States Power-On SwitchSleep States Acpi GEP1 Signal/Device ConditionWake Up Activities Introduction Accessing Bios Setup Utility VGA DisplayBios Setup Utility Menu Item/Topic Accessing Bios Setup Utility Remote AccessESC Bios MenusBios Main Setup Screen Key DescriptionAcpi Configuration Bios Advanced Setup ScreenPCI IRQ Resource Exclusion PCI ConfigurationFlat Panel Resolution BITs Auto Parallel ATA in Enhanced/Native ModeSerial ATA in Enhanced/Native Mode Azalia Intel High Definition Audio Graphics ConfigurationChipset Configuration CPU ConfigurationInterface Configuration PCI Express ConfigurationClock Configuration Primary IDE Master Not Detected or Device Type IDE ConfigurationChapter Bios Setup Utility Secondary IDE Master Not Detected or Device Type Primary IDE Slave Not Detected or Device TypeThird IDE Master Not Detected or Device Type Secondary IDE Slave Not Detected or Device TypeFourth IDE Master Not Detected or Device Type Third IDE Slave Not Detected or Device TypeFourth IDE Slave Not Detected or Device Type Module Version USB Devices Enabled Drives None USB ConfigurationUSB Mass Storage Device Configuration Bios Post Keyboard/Mouse ConfigurationHardware Health Event Monitoring Hardware Health ConfigurationWatchdog Configuration Chapter Bios Setup Utility Boot Device Priority Bios Boot Setup ScreenBoot Priority Selection Device Based or Type Based Boot Settings Configuration Loss Control feature To clear Supervisor password Bios Security Setup ScreenHard Disk Security APM Bios Power Setup ScreenChapter Bios Setup Utility Exit Options Bios Exit Setup ScreenLoading Defaults Reference Manual XTX Method Contact Information Appendix a Technical SupportAppendix a Appendix B LAN Boot Feature Initializing Intel R Boot Agent FE PXE v2.0 Build 0xx WfM Accessing the LAN PXE Boot FeaturePress F12 if you want to boot from the Network Alternate Method of Selecting LAN BootReference Manual XTX J6 Sdvo Appendix C Connector Part NumbersAppendix C PCI AcpiRTC USBCD-ROM Real Time Clock RTC Reference material WDT