Chapter 3 |
| Hardware | |
Table | |||
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| J1 Pin # | Signal | Description |
| 38 | AUXAL | Auxiliary A input Left – This signal is normally used for an external |
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| analog output or similar |
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| 5k Ohms and nominal input level is 1 volt RMS. |
| 40 | MIC | Microphone reference signal – This microphone input signal has a minimum |
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| input impedance of 5k Ohms, and the maximum input voltage is 0.15 |
| 42 | AUXAR | Auxiliary A input Right – This signal is normally used for an external |
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| analog output or similar |
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| 5k Ohms and nominal input level is 1 volt RMS. |
| 44 | ASVCC | Analog Supply Voltage – This test voltage is used for the sound controller, but |
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| is not available for customer use. |
| 46 | SNDL | Stereo Line Output Left channel – This output signal has a nominal level of 1 |
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| volt RMS into 10k impedance load. This output signal can not drive low- |
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| impedance speakers directly. |
| 48 | ASGND | Analog Ground – This ground is used for the sound controller and an external |
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| amplifier to achieved the lowest audio noise levels. |
| 50 | SNDR | Stereo Line Output Right channel – This output signal has a nominal level of 1 |
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| volt RMS into 10k impedance load. This output signal can not drive low- |
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| impedance speakers directly |
Note: The shaded area denotes power or ground.
Table
Pin # | Signal | Description |
1 | GND | Ground |
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2 | GND | Ground |
3 | PCICLK3 | PCI clock 3 – This signal line is one of four signal lines. These clock signals |
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| provide the timing outputs for four external PCI devices and the timing for |
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| all transactions on the PCI bus. |
4 | PCICLK4 | PCI clock 4 – Refer to |
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5 | GND | Ground |
6 | GND | Ground |
7 | PCICLK1 | PCI clock 1 – Refer to |
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8 | PCICLK2 | PCI clock 2 – Refer to |
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9 | REQ3* | Bus Request 3 – This signal line is one of four signal lines. These signals |
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| indicate to the arbitrator that the device desires use of the bus. |
10 | GNT3* | Grant 3 – This signal line is one of four signal lines. These signal lines |
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| indicate access has been granted to the requesting device (PCI Masters). |
11 | GNT2* | Grant 3 – Refer to pin 10 for more information. |
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12 | +3.3V | +3.3 volts |
13 | REQ2* | Bus Request 0 – This signal line is one of three signal lines. These signals |
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| indicate the device desires use of the bus to the arbitrator. |
14 | GNT1* | Grant 1 – Refer to pin 10 for more information. |
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15 | REQ1* | Bus Request 1 – Refer to pin 9 for more information. |
16 | +3.3V | +3.3 volts |
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XTX 820 | Reference Manual | 25 |