Ampro Corporation XTX 820 manual Lvds Interface

Page 46

Chapter 3

Hardware

Table 3-20. Simplified CRT Interface Pin/Signal Descriptions (J3)

J3

Signal

VGA

Description

Pin #

 

15-Pin #

 

3

RED

1

Red – This is the Red analog output signal to the CRT.

 

 

 

 

6

GREEN

2

Green – This is the Green analog output signal to the CRT.

 

 

 

 

4

BLUE

3

Blue – This is the Blue analog output signal to the CRT.

NC

NC

4

Not Connected

 

 

 

 

 

GND

5, 6, 7, 8, 10

Ground

NC

NC

9

Not Connected

 

NC

11

Not Connected

 

 

 

 

10

DDDA

12

Display Data Channel Data – This signal line provides information to

 

 

 

the Memory & Graphics Hub about the monitor type, brand, model.

 

 

 

This is part of the Plug and Play standard developed by the VESA

 

 

 

trade association.

5

HSYNC

13

Horizontal Sync – This signal is used for the digital horizontal sync

 

 

 

output to the CRT.

7

VSYNC

14

Vertical Sync – This signal is used for the digital vertical sync output

 

 

 

to the CRT.

8

DDCK

15

Display Data Channel Clock – This signal line provides the data clock

 

 

 

signal to the Memory & Graphics Hub from the monitor. This is part

 

 

 

of the Plug and Play standard developed by the VESA trade

 

 

 

association.

Note: The shaded area denotes power or ground.

LVDS Interface

The LVDS interface is dedicated and independent of the other video interfaces and provides the following features:.

Supports ANSI/TIA/EIA-644-2001 specification compliance

Supports 25 to 112 MHz single/dual channel LVDS interface with Spread Spectrum Clocking (SSC)

NOTE

Spread Spectrum Clocking is controlled in BIOS Setup under the

 

Advanced menu. Refer to Chapter 4, BIOS Setup for the Clock

 

Configuration where you can set the Spread Spectrum Clock.

 

 

Supports maximum TFT pixel format of 1x18 bpp for one channel and 2x18 bpp for 2 channels

Supports flat panel size up to UXGA (1600 x 1200)

Supports Wide panel size up to WUXGA (1920 x 1200)

Provides Automatic Panel Detection using EPI (Embedded Panel Interface based on VESA EDID™ 1.3)

Supports Intel® Display Power Savings Technology 2.0

Refer to Table 3-21 for the Simplified LVDS Interface Pin/Signal Descriptions.

40

Reference Manual

XTX 820

Image 46
Contents XTX Computer On Module Reference Manual Audience Assumptions Contents Index List of Figures List of Tables Reference Manual XTX Purpose of this Manual SpecificationsReference Material Related Ampro Products XTX 820 Support ProductsAmpro ETX Products Ampro XTX ProductsOther Ampro Products Chapter Chapter Product Overview ETX→ Concept and XTX ExtensionProduct Description Hardware Design PathBoard Features Chapter Chapter Block Diagram COM1 COM2CPU Major Integrated Circuits ICsChip Type Mfg Model Description Function GmhcConnector Definitions Signals DescriptionMechanical Specifications SpecificationsPhysical Specifications DimensionThermal/Cooling Solutions Power SpecificationsEnvironmental Specifications Parameter GHz ULV Celeron GHz LV Pentium M CharacteristicsHardware OverviewCPU U1 MemoryAddress Range Decimal Hex Memory MapAvailable Typical Interrupt Source Connected to Pin SizeAddress hex Size Available Description Address MapAddress Range Size Description Decimal Hex 0CFC 0CFFPCI Bus PCI Bus Interface Connector J1Signal Pin #Devsel GNTPME FrameCBE0 GNDAD9 AD6CBE3 CLKREQ CBE2CBE1 Universal Serial Bus USB Signal Description Pin #J1 Pin # Signal Description Serial Interrupt RequestPin # Signal Description VCC1 GNT0VCC0 SerirqVCC3 AoutrVCC2 ReservedVCC4 VCC5PCI Express Interface J2 PCI Express/ExpressCardsSerial ATA Additional Universal Serial Bus USB PortsLPC Interface Extended System ManagementFantachoin PCIGNT#APCIREQ#A FanpwmoutEXC1RST# Fan tachometer input Primary I/O Interface J3 Signal 34-Pin Description Pin # CableFloppy Port Signal DB25 Description Pin # Parallel Port Serial Ports 1 PS/2 Mouse Infrared IrDA PortPS/2 Keyboard CTS2CRT Interface Internal Graphics FeaturesVideo Interface Video EngineLvds Interface J3 Pin # Signal Description TV Out Component and S-Video Comp Floppy Write Protect Senses the diskette is write protected DRV MOTIDE and Auxiliary Interface J4 IDE PortsPiderdy PideiowPideior CblidpLiled Ethernet Port InterfaceTX+ ActledPower Management Signals Power Control SignalsSpeaker Real Time Clock RTC/Battery SMBus I2C BusMatrix Component Address Binary GND4 I2DATGND2 GPE1GND7 GND5VCC6 RXD+ GPE2RXD TXDMiscellaneous Sdvo PortSerial Console Remote Access Temperature MonitoringWatchdog Timer WDT Power-On Switch Power InputPower and Sleep States PwrokSleep States Acpi Wake Up Activities Signal/Device ConditionGEP1 Accessing Bios Setup Utility VGA Display IntroductionAccessing Bios Setup Utility Remote Access Bios Setup Utility Menu Item/TopicKey Description Bios MenusBios Main Setup Screen ESCBios Advanced Setup Screen Acpi ConfigurationPCI Configuration PCI IRQ Resource ExclusionAzalia Intel High Definition Audio Graphics Configuration Parallel ATA in Enhanced/Native ModeSerial ATA in Enhanced/Native Mode Flat Panel Resolution BITs AutoCPU Configuration Chipset ConfigurationPCI Express Configuration Interface ConfigurationClock Configuration IDE Configuration Primary IDE Master Not Detected or Device TypeChapter Bios Setup Utility Primary IDE Slave Not Detected or Device Type Secondary IDE Master Not Detected or Device TypeSecondary IDE Slave Not Detected or Device Type Third IDE Master Not Detected or Device TypeThird IDE Slave Not Detected or Device Type Fourth IDE Master Not Detected or Device TypeFourth IDE Slave Not Detected or Device Type USB Configuration Module Version USB Devices Enabled Drives NoneUSB Mass Storage Device Configuration Keyboard/Mouse Configuration Bios PostWatchdog Configuration Hardware Health ConfigurationHardware Health Event Monitoring Chapter Bios Setup Utility Boot Priority Selection Device Based or Type Based Bios Boot Setup ScreenBoot Device Priority Boot Settings Configuration Loss Control feature Bios Security Setup Screen To clear Supervisor passwordHard Disk Security Bios Power Setup Screen APMChapter Bios Setup Utility Bios Exit Setup Screen Exit OptionsLoading Defaults Reference Manual XTX Appendix a Technical Support Method Contact InformationAppendix a Appendix B LAN Boot Feature Accessing the LAN PXE Boot Feature Initializing Intel R Boot Agent FE PXE v2.0 Build 0xx WfMAlternate Method of Selecting LAN Boot Press F12 if you want to boot from the NetworkReference Manual XTX Appendix C Connector Part Numbers J6 SdvoAppendix C Acpi PCICD-ROM USBRTC Real Time Clock RTC Reference material WDT