Chapter 3 | Hardware |
Pin # | Signal | Description |
83 | NC | Not Connected (SIDE_D9) |
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84 | PIDE_D5 | Primary Disk Data 5 – Refer to |
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85 | NC | Not Connected (SIDE_D6) |
86 | PIDE_D9 | Primary Disk Data 9 – Refer to |
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87 | NC | Not Connected (SIDE_D8) |
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88 | PIDE_D6 | Primary Disk Data 6 – Refer to |
89 | GPE2* | General Purpose Power Management Event Input 2. This signal may be |
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| driven low by external circuitry to signal an external power management |
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| event. This pin is commonly connected to the chipset’s RING# input. |
90 | CBLID_P* | Primary Cable ID Select – Used to detect the presence of an 80 conductor |
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| IDE cable on the primary IDE channel. This allows BIOS or system |
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| software to determine if is necessary to enable the |
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| modes (DMA66 or DMA100). |
91 | RXD- | Half of Ethernet Analog Twisted Pair Receive Differential Pair – This pin |
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| and |
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| stream on the Unshielded Twisted Pair Cable (UTP). |
92 | PIDE_D8 | Primary Disk Data 8 – Refer to |
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93 | RXD+ | Half of Ethernet Analog Twisted Pair Receive Differential Pair – Refer to |
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94 | NC | Not Connected (SIDE_D7) |
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95 | TXD- | Half of Ethernet Analog Twisted Pair Transmit Differential Pair – This pin |
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| and |
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| stream on the Unshielded Twisted Pair Cable (UTP). |
96 | PIDE_D7 | Primary Disk Data 7 – Refer to |
97 | TXD+ | Half of Ethernet Analog Twisted Pair Transmit Differential Pair – Refer to |
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98 | HDRST* | Hard Reset – Low active hardware reset (RSTDRV inverted) |
99 | GND6 | Ground |
100 | GND8 | Ground |
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Notes: The shaded area denotes power or ground. The signals marked with * = Negative true logic.
54 | Reference Manual | XTX 820 |