Ampro Corporation XTX 820 manual Power Control Signals, Power Management Signals, Speaker

Page 55

Chapter 3

Hardware

Power Control Signals

The XTX 820 supports various power control signals provided by the baseboard to control the XTX module. These signals are listed here and in Tables 3-26 and 3-23.

The Power Good input signal (PWGIN) is provided from an external input typically from the external power supply (ATX) to the baseboard. This signal is typically an active-high input to the XTX board and indicates to the XTX board it can begin the boot process. This Power Good signal can also be used as an active-low reset input to the XTX module.

The Power Suspend signal (5V_SB) must be provided by a power supply capable of standby operation, typically an ATX power supply. The power supply must provide a 5 volt 100 ma stand-by power source for this function to be available.

The Power On signal (PS_ON) is provided by the XTX module to the PS_ON input of an ATX power supply allowing it to switch to the main output power from a standby state. This signal is used in conjunction with the 5V_SB supplied to the XTX module from the ATX power supply.

The Power Button Input signal (PWRBTN*) provides a ground temporarily through a momentary-contact switch or through an open collector driver to the ATX power supply. This signal is used in conjunction with the PS_ON and the 5V_SB signals from the ATX power supply to activate the power control button function of the power supply.

A voltage monitor on the XTX 820 tracks the VCC voltage (+5 volts) state by monitoring the +3.3V generated on the XTX module. When the +3.3V drops below 3.0V or the Reset Button signal goes low, the voltage monitor sends a reset pulse to the Memory & Graphics Hub (Northbridge) chip (82915GM), the I/O Hub (Southbridge) chip (82801FBM), Super I/O

(W83627HG) chip and the CPU.

Power Management Signals

The XTX 820 supports various power management signals listed below and in Tables 3-20 and 3-22.

The External System Management Interrupt (EXTSMI) signal is routed to the baseboard through J4 to allow external circuitry to initiate an SMI for the EXT module.

The Resume Reset input (RSMRST*) signal to the EXT module may be driven low by external control circuitry to reset the power management logic on the XTX module.

The System Management Bus Alert input (SMBALRT*) signal is used by SMBus devices to indicate an event on the SMBus to the EXT module.

The Battery Low input (BATLOW*) signal is used by external voltage monitoring circuitry to indicate to the XTX module that the system battery is low.

NOTE

Refer also to the additional Power Management Signals on J2.

 

 

Speaker

The signal lines for a speaker port with 0.1-watt drive are provided through J4 connector to the baseboard where the speaker may be located.

The Super I/O (83627HG) provides the speaker output signal, but the output driver circuit must be implemented on the baseboard

XTX 820

Reference Manual

49

Image 55
Contents XTX Computer On Module Reference Manual Audience Assumptions Contents Index List of Figures List of Tables Reference Manual XTX Purpose of this Manual SpecificationsReference Material XTX 820 Support Products Related Ampro ProductsAmpro ETX Products Ampro XTX ProductsOther Ampro Products Chapter ETX→ Concept and XTX Extension Chapter Product OverviewHardware Design Path Product DescriptionBoard Features Chapter Chapter COM1 COM2 Block DiagramGmhc Major Integrated Circuits ICsChip Type Mfg Model Description Function CPUSignals Description Connector DefinitionsDimension SpecificationsPhysical Specifications Mechanical SpecificationsParameter GHz ULV Celeron GHz LV Pentium M Characteristics Power SpecificationsEnvironmental Specifications Thermal/Cooling SolutionsOverview HardwareMemory CPU U1Size Memory MapAvailable Typical Interrupt Source Connected to Pin Address Range Decimal Hex0CFC 0CFF Address MapAddress Range Size Description Decimal Hex Address hex Size Available DescriptionPin # PCI Bus Interface Connector J1Signal PCI BusFrame GNTPME DevselAD6 GNDAD9 CBE0CBE2 CLKREQ CBE3CBE1 Serial Interrupt Request Signal Description Pin #J1 Pin # Signal Description Universal Serial Bus USBPin # Signal Description Serirq GNT0VCC0 VCC1Reserved AoutrVCC2 VCC3VCC5 VCC4PCI Express/ExpressCards PCI Express Interface J2Additional Universal Serial Bus USB Ports Serial ATAExtended System Management LPC InterfaceFanpwmout PCIGNT#APCIREQ#A FantachoinEXC1RST# Fan tachometer input Primary I/O Interface J3 Signal 34-Pin Description Pin # CableFloppy Port Parallel Port Signal DB25 Description Pin #Serial Ports 1 CTS2 Infrared IrDA PortPS/2 Keyboard PS/2 MouseVideo Engine Internal Graphics FeaturesVideo Interface CRT InterfaceLvds Interface J3 Pin # Signal Description TV Out Component and S-Video Comp Floppy Write Protect Senses the diskette is write protected MOT DRV IDE Ports IDE and Auxiliary Interface J4Cblidp PideiowPideior PiderdyActled Ethernet Port InterfaceTX+ LiledPower Management Signals Power Control SignalsSpeaker SMBus I2C Bus Real Time Clock RTC/BatteryMatrix Component Address Binary GPE1 I2DATGND2 GND4GND7 GND5VCC6 TXD GPE2RXD RXD+Sdvo Port MiscellaneousTemperature Monitoring Serial Console Remote AccessWatchdog Timer WDT Pwrok Power InputPower and Sleep States Power-On SwitchSleep States Acpi Wake Up Activities Signal/Device ConditionGEP1 Introduction Accessing Bios Setup Utility VGA DisplayBios Setup Utility Menu Item/Topic Accessing Bios Setup Utility Remote AccessESC Bios MenusBios Main Setup Screen Key DescriptionAcpi Configuration Bios Advanced Setup ScreenPCI IRQ Resource Exclusion PCI ConfigurationFlat Panel Resolution BITs Auto Parallel ATA in Enhanced/Native ModeSerial ATA in Enhanced/Native Mode Azalia Intel High Definition Audio Graphics ConfigurationChipset Configuration CPU ConfigurationInterface Configuration PCI Express ConfigurationClock Configuration Primary IDE Master Not Detected or Device Type IDE ConfigurationChapter Bios Setup Utility Secondary IDE Master Not Detected or Device Type Primary IDE Slave Not Detected or Device TypeThird IDE Master Not Detected or Device Type Secondary IDE Slave Not Detected or Device TypeFourth IDE Master Not Detected or Device Type Third IDE Slave Not Detected or Device TypeFourth IDE Slave Not Detected or Device Type Module Version USB Devices Enabled Drives None USB ConfigurationUSB Mass Storage Device Configuration Bios Post Keyboard/Mouse ConfigurationWatchdog Configuration Hardware Health ConfigurationHardware Health Event Monitoring Chapter Bios Setup Utility Boot Priority Selection Device Based or Type Based Bios Boot Setup ScreenBoot Device Priority Boot Settings Configuration Loss Control feature To clear Supervisor password Bios Security Setup ScreenHard Disk Security APM Bios Power Setup ScreenChapter Bios Setup Utility Exit Options Bios Exit Setup ScreenLoading Defaults Reference Manual XTX Method Contact Information Appendix a Technical SupportAppendix a Appendix B LAN Boot Feature Initializing Intel R Boot Agent FE PXE v2.0 Build 0xx WfM Accessing the LAN PXE Boot FeaturePress F12 if you want to boot from the Network Alternate Method of Selecting LAN BootReference Manual XTX J6 Sdvo Appendix C Connector Part NumbersAppendix C PCI AcpiCD-ROM USBRTC Real Time Clock RTC Reference material WDT