Chapter 3 | Hardware |
AC'97/HDA CODEC
The additional signals provided by J2 support AC'97 digital audio CODECs as well HDA (High Definition Audio) audio CODECs.
Table
Pin # | Signal | Description |
81 | AC_RST* | AC'97/HDA CODEC Reset |
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85 | AC_SYNC | AC'97/HDA Serial Bus Synchronization |
89 | AC_BIT_CLK | AC'97/HDA 12.228 MHz Serial Bit Clock from CODEC |
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82 | AC_SDOUT | AC'97/HDA Audio Serial Data Output to CODEC |
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86 | AC_SDIN0 | AC'97/HDA Audio Serial Data Input from CODEC0 |
87 | AC_SDIN1 | AC'97/HDA Audio Serial Data Input from CODEC1 |
88 | AC_SDIN2 | AC'97/HDA Audio Serial Data Input from CODEC2 |
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79 | CODECSET | AC`97/HDA Disable onboard Audio CODEC |
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Notes: The shaded area denotes power or ground. The signals marked with * = Negative true logic.
LPC Interface
The LPC (Low Pin Count) bus is provided as a replacement for the increasingly less often used ISA bus. The LPC bus is used on
Table
Pin # | Signal | Description |
91 | LPC_AD0 | LPC Multiplexed Command, Address and Data Line 0 |
93 | LPC_AD1 | LPC Multiplexed Command, Address and Data Line 1 |
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94 | LPC_FRAME* | LPC Frame – Indicates start of a new or termination of a broken cycle. |
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95 | LPC_AD2 | LPC Multiplexed Command, Address and Data Line 2 |
96 | LPC_DRQ0* | LPC Encoded DMA/Bus Master Request Line 0 |
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97 | LPC_AD3 | LPC Multiplexed Command, Address and Data Line 3 |
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98 | LPC_DRQ1* | LPC Encoded DMA/Bus Master Request Line 1 |
Notes: The shaded area denotes power or ground. The signals marked with * = Negative true logic.
Extended System Management
The Extended System Management interface, implemented by the Super I/O chip (W83627HG), provide additional signals and functions to further improve system management. One of these signals is an output signal called FAN_PMOUT that allows system fan control using a PWM (Pulse Width Modulation) Output. Additionally there is an input signal called FAN_TACHOIN that provides the ability to monitor the system fan's RPMs (revolutions per minute).
XTX 820 | Reference Manual | 31 |