Ampro Corporation XTX 820 manual LPC Interface, Extended System Management

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Chapter 3

Hardware

AC'97/HDA CODEC

The additional signals provided by J2 support AC'97 digital audio CODECs as well HDA (High Definition Audio) audio CODECs.

Table 3-12. Audio CODEC Interface Pin/Signal Descriptions (J2)

Pin #

Signal

Description

81

AC_RST*

AC'97/HDA CODEC Reset

 

 

 

85

AC_SYNC

AC'97/HDA Serial Bus Synchronization

89

AC_BIT_CLK

AC'97/HDA 12.228 MHz Serial Bit Clock from CODEC

 

 

 

82

AC_SDOUT

AC'97/HDA Audio Serial Data Output to CODEC

 

 

 

86

AC_SDIN0

AC'97/HDA Audio Serial Data Input from CODEC0

87

AC_SDIN1

AC'97/HDA Audio Serial Data Input from CODEC1

88

AC_SDIN2

AC'97/HDA Audio Serial Data Input from CODEC2

 

 

 

79

CODECSET

AC`97/HDA Disable onboard Audio CODEC

 

 

 

Notes: The shaded area denotes power or ground. The signals marked with * = Negative true logic.

LPC Interface

The LPC (Low Pin Count) bus is provided as a replacement for the increasingly less often used ISA bus. The LPC bus is used on PC-style personal computers to connect low-bandwidth devices to the CPU, such as the boot ROM, "legacy" I/O devices (supported by a Super I/O chip), and audio controllers. The "legacy" I/O devices usually include serial and parallel ports, keyboard, mouse, and a floppy disk controller. Due to the software compatibility of the LPC bus to the ISA bus, I/O devices such as additional serial ports can be easily implemented on an application specific baseboard using the LPC bus. There are also many devices available for the LPC bus.

Table 3-13. LPC Interface Pin/Signal Descriptions (J2)

Pin #

Signal

Description

91

LPC_AD0

LPC Multiplexed Command, Address and Data Line 0

93

LPC_AD1

LPC Multiplexed Command, Address and Data Line 1

 

 

 

94

LPC_FRAME*

LPC Frame – Indicates start of a new or termination of a broken cycle.

 

 

 

95

LPC_AD2

LPC Multiplexed Command, Address and Data Line 2

96

LPC_DRQ0*

LPC Encoded DMA/Bus Master Request Line 0

 

 

 

97

LPC_AD3

LPC Multiplexed Command, Address and Data Line 3

 

 

 

98

LPC_DRQ1*

LPC Encoded DMA/Bus Master Request Line 1

Notes: The shaded area denotes power or ground. The signals marked with * = Negative true logic.

Extended System Management

The Extended System Management interface, implemented by the Super I/O chip (W83627HG), provide additional signals and functions to further improve system management. One of these signals is an output signal called FAN_PMOUT that allows system fan control using a PWM (Pulse Width Modulation) Output. Additionally there is an input signal called FAN_TACHOIN that provides the ability to monitor the system fan's RPMs (revolutions per minute).

XTX 820

Reference Manual

31

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Contents XTX Computer On Module Reference Manual Audience Assumptions Contents Index List of Figures List of Tables Reference Manual XTX Purpose of this Manual SpecificationsReference Material XTX 820 Support Products Related Ampro ProductsAmpro ETX Products Ampro XTX ProductsOther Ampro Products Chapter ETX→ Concept and XTX Extension Chapter Product OverviewHardware Design Path Product DescriptionBoard Features Chapter Chapter COM1 COM2 Block DiagramChip Type Mfg Model Description Function Major Integrated Circuits ICsCPU GmhcSignals Description Connector DefinitionsPhysical Specifications SpecificationsMechanical Specifications DimensionEnvironmental Specifications Power SpecificationsThermal/Cooling Solutions Parameter GHz ULV Celeron GHz LV Pentium M CharacteristicsOverview HardwareMemory CPU U1Available Typical Interrupt Source Connected to Pin Memory MapAddress Range Decimal Hex SizeAddress Range Size Description Decimal Hex Address MapAddress hex Size Available Description 0CFC 0CFFSignal PCI Bus Interface Connector J1PCI Bus Pin #PME GNTDevsel FrameAD9 GNDCBE0 AD6REQ CLKCBE3 CBE2CBE1 J1 Pin # Signal Description Signal Description Pin #Universal Serial Bus USB Serial Interrupt RequestPin # Signal Description VCC0 GNT0VCC1 SerirqVCC2 AoutrVCC3 Reserved VCC5 VCC4PCI Express/ExpressCards PCI Express Interface J2Additional Universal Serial Bus USB Ports Serial ATAExtended System Management LPC InterfacePCIREQ#A PCIGNT#AFantachoin FanpwmoutEXC1RST# Fan tachometer input Primary I/O Interface J3 Signal 34-Pin Description Pin # CableFloppy Port Parallel Port Signal DB25 Description Pin #Serial Ports 1 PS/2 Keyboard Infrared IrDA PortPS/2 Mouse CTS2Video Interface Internal Graphics FeaturesCRT Interface Video EngineLvds Interface J3 Pin # Signal Description TV Out Component and S-Video Comp Floppy Write Protect Senses the diskette is write protected MOT DRVIDE Ports IDE and Auxiliary Interface J4Pideior PideiowPiderdy CblidpTX+ Ethernet Port InterfaceLiled ActledPower Management Signals Power Control SignalsSpeaker SMBus I2C Bus Real Time Clock RTC/BatteryMatrix Component Address Binary GND2 I2DATGND4 GPE1GND7 GND5VCC6 RXD GPE2RXD+ TXDSdvo Port MiscellaneousTemperature Monitoring Serial Console Remote AccessWatchdog Timer WDT Power and Sleep States Power InputPower-On Switch PwrokSleep States Acpi Wake Up Activities Signal/Device ConditionGEP1 Introduction Accessing Bios Setup Utility VGA DisplayBios Setup Utility Menu Item/Topic Accessing Bios Setup Utility Remote AccessBios Main Setup Screen Bios MenusKey Description ESCAcpi Configuration Bios Advanced Setup ScreenPCI IRQ Resource Exclusion PCI ConfigurationSerial ATA in Enhanced/Native Mode Parallel ATA in Enhanced/Native ModeAzalia Intel High Definition Audio Graphics Configuration Flat Panel Resolution BITs AutoChipset Configuration CPU ConfigurationInterface Configuration PCI Express ConfigurationClock Configuration Primary IDE Master Not Detected or Device Type IDE ConfigurationChapter Bios Setup Utility Secondary IDE Master Not Detected or Device Type Primary IDE Slave Not Detected or Device TypeThird IDE Master Not Detected or Device Type Secondary IDE Slave Not Detected or Device TypeFourth IDE Master Not Detected or Device Type Third IDE Slave Not Detected or Device TypeFourth IDE Slave Not Detected or Device Type Module Version USB Devices Enabled Drives None USB ConfigurationUSB Mass Storage Device Configuration Bios Post Keyboard/Mouse ConfigurationWatchdog Configuration Hardware Health ConfigurationHardware Health Event Monitoring Chapter Bios Setup Utility Boot Priority Selection Device Based or Type Based Bios Boot Setup ScreenBoot Device Priority Boot Settings Configuration Loss Control feature To clear Supervisor password Bios Security Setup ScreenHard Disk Security APM Bios Power Setup ScreenChapter Bios Setup Utility Exit Options Bios Exit Setup ScreenLoading Defaults Reference Manual XTX Method Contact Information Appendix a Technical SupportAppendix a Appendix B LAN Boot Feature Initializing Intel R Boot Agent FE PXE v2.0 Build 0xx WfM Accessing the LAN PXE Boot FeaturePress F12 if you want to boot from the Network Alternate Method of Selecting LAN BootReference Manual XTX J6 Sdvo Appendix C Connector Part NumbersAppendix C PCI AcpiCD-ROM USBRTC Real Time Clock RTC Reference material WDT