Xilinx 1.8 manual About This Guide, Contents, Conventions

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Preface

About This Guide

The Endpoint Block Plus for PCI Express® Getting Started Guide provides information about generating an Endpoint Block Plus for PCI Express (PCIe®) core, customizing and simulating the core using the provided example design, and running the design files through implementation using the Xilinx tools.

Contents

This guide contains the following chapters:

•Preface, “About this Guide,” introduces the organization and purpose of this guide and the conventions used in this document.

•Chapter 1, “Introduction,” describes the core and related information, including system requirements, recommended design experience, additional resources, technical support, and submitting feedback to Xilinx.

•Chapter 2, “Licensing the Core” provides instructions for selecting a license option for the core.

•Chapter 3, “Quickstart Example Design,” provides instructions for quickly generating, simulating, and implementing the example design and the dual core example design using the demonstration test bench.

•Appendix, “Additional Design Considerations,” defines additional considerations when implementing the example design.

Conventions

This document uses the following conventions. An example illustrates each convention.

Typographical

The following typographical conventions are used in this document:

Convention

Meaning or Use

Example

 

 

 

 

Messages, prompts, and

 

Courier font

program files that the system

speed grade: - 100

 

displays

 

 

 

 

Courier bold

Literal commands you enter in

ngdbuild design_name

a syntactical statement

 

 

 

Endpoint Block Plus v1.8 for PCI Express

www.xilinx.com

5

UG343 June 27, 2008

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Contents UG343 June 27 LogiCORE IP Endpoint Block Plus v1.8 for PCI ExpressDate Version Revision Revision HistoryTable of Contents Appendix Additional Design Considerations Conventions ContentsAbout This Guide Preface About This Guide Online DocumentAbout the Core IntroductionSystem Requirements Recommended Design ExperienceTechnical Support Additional Core ResourcesFeedback CoreFeedback DocumentIntroduction Before you Begin Licensing the CoreLicense Options Simulation OnlyLicensing the Core Installing Your License FileObtaining Your License Simulation Design Overview Quickstart Example DesignOverview Quickstart Example Design 1Simulation Example Design Block DiagramOverview Implementation Design OverviewExample Design Elements 3New Project Dialog Box Generating the Core5Endpoint Block Plus Main Screen Generating the CoreRunning the Simulation Setting up for SimulationSimulating the Example Design Implementing the Example Design Implementing the Example DesignWindows LinuxDirectory Structure and File Contents Component name/doc Project directoryProject directory/component name Component name/implement Component name/exampledesign4Example Design Directory Name Description 5Implement Directory Name DescriptionComponent name/simulation Implement/results6Results Directory Name Description 7Simulation Directory Name DescriptionSimulation/functional Simulation/dsport8dsport Directory Name Description 9Functional Directory Name DescriptionSimulation/tests Dual Core Example DesignDual Core Example Design 10Tests Directory Name DescriptionDual Core Directory Structure and File Contents 11Example Design Directory Name Description Exampledesign/dualcore12Dual Core Directory Name Description 13Simulation Directory Name Description15Implement Directory Name Description 14Functional Directory Name DescriptionUser Constraints Files Package ConstraintsWrapper File Usage Device/Part NumberAppendix Appendix Additional Design Considerations
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