R
Chapter 3: Quickstart Example Design
Output
Logs
|
| Downstream Port | |
usrapp_com | Model TPI for | ||
|
| PCI Express | |
usrapp_rx | usrapp_tx | Test | |
Program | |||
|
| ||
| dsport |
| |
|
| PCI Express Fabric |
Endpoint Core for
PCI Express
PIO
Design
Endpoint DUT for PCI Express
Figure 3-1: Simulation Example Design Block Diagram
14 | www.xilinx.com | Endpoint Block Plus v1.8 for PCI Express |
|
| UG343 June 27, 2008 |