Silicon Laboratories SI4421 Si4421, Description of the Control Commands, Power Management Command

Page 15
Description of the Control Commands

Si4421

Description of the Control Commands

 

 

 

 

 

 

 

 

 

 

1.

Configuration Setting Command

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Bit

 

15

14

13

12

11

10

 

9

8

7

6

5

4

3

2

1

0

POR

 

 

 

1

0

0

0

0

0

 

0

0

el

ef

b1

b0

x3

x2

x1

x0

8008h

Bit el enables the internal data register.

Bit ef enables the FIFO mode. If ef = 0 then DATA (pin 6) and DCLK (pin 7) are used for data and data clock output.

b1

b0

Frequency Band

0

0

Reserved

0

1

433

1

0

868

1

1

915

2. Power Management Command

x3

0

0

0

0

1

1

x2

 

x1

x0

Crystal Load Capacitance [pF]

0

 

0

0

8.5

0

 

0

1

9.0

0

 

1

0

9.5

0

 

1

1

10.0

 

 

 

 

1

 

 

 

 

1

0

15.5

1

 

1

1

16.0

 

Bit

 

15

 

14

13

12

11

 

10

9

8

7

 

6

5

 

4

3

 

2

1

0

POR

 

 

 

 

1

 

 

0

0

0

0

 

0

1

0

er

 

ebb

et

 

es

ex

 

eb

ew

dc

8208h

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Bit

 

 

Function of the control bit

 

 

 

 

 

 

 

Related blocks

 

 

 

 

 

 

er

 

 

Enables the whole receiver chain

 

 

 

 

 

 

RF front end, baseband, synthesizer, crystal oscillator

 

 

ebb

 

 

The receiver baseband circuit can be separately switched on

 

Baseband

 

 

 

 

 

 

et

 

 

Switches on the PLL, the power amplifier, and starts the

 

 

Power amplifier, synthesizer, crystal oscillator

 

 

 

 

transmission (If TX register is enabled)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

es

 

 

Turns on the synthesizer

 

 

 

 

 

 

 

Synthesizer

 

 

 

 

 

 

ex

 

 

Turns on the crystal oscillator

 

 

 

 

 

 

 

Crystal oscillator

 

 

 

 

 

eb

 

 

Enables the low battery detector

 

 

 

 

 

 

Low battery detector

 

 

 

 

 

ew

 

 

Enables the wake-up timer

 

 

 

 

 

 

 

Wake-up timer

 

 

 

 

 

 

dc

 

 

Disables the clock output (pin 8)

 

 

 

 

 

 

Clock output buffer

 

 

 

 

The ebb, es, and ex bits are provided to optimize the TX to RX or RX to TX turnaround time.

The RF frontend consist of the LNA (low noise amplifier) and the mixer. The synthesizer block has two main components: the VCO and the PLL. The baseband section contains the baseband amplifier, low pass filter, limiter and the I/Q demodulator.

To decrease TX/RX turnaround time, it is possible to leave the baseband section powered on. Switching to RX mode means disabling the PA and enabling the RF frontend. Since the baseband block is already on, the internal startup calibration will not be performed, the turnaround time will be shorter.

The synthesizer also has an internal startup calibration procedure. If quick RX/TX switching needed it may worth to leave this block on. Enabling the transmitter using the et bit will turn on the PA, the synthesizer is already up and running. The power amplifier almost immediately produces TX signal at the output.

The crystal oscillator provides reference signal to the RF synthesizer, the baseband circuits and the digital signal processor part. When the receiver or the transmitter part frequently used, it is advised to leave the oscillator running because the crystal might need a few milliseconds to start. This time mainly depends on the crystal parameters.

It is important to note that leaving blocks unnecessary turned on can increase the current consumption thus decreasing the battery life.

15

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Contents TYPICAL APPLICATIONS FUNCTIONAL BLOCK DIAGRAMFEATURES DESCRIPTIONSi4421 DETAILED FEATURE-LEVELDESCRIPTIONRF Power Amplifier PA Data Filtering and Clock RecoveryCrystal Oscillator Low Battery Voltage DetectorWake-UpTimer Data Validity BlocksFunction Si4421 PACKAGE PIN DEFINITIONSName TypeInternal connection Si4421Internal Pin Connections NameSi4421 PIN6 Logic Diagram FSK / DATA / nFFSPIN10 Logic Diagram nRES I/O Note These pins can be left floatingPin Function vs. Operation Mode Si4421Typical Application Recommended supply decoupling capacitor valuesSi4421 GENERAL DEVICE SPECIFICATIONS Absolute Maximum Ratings non-operatingRecommended Operating Range ELECTRICAL SPECIFICATION DC CharacteristicsSi4421 AC Characteristics PLL parameters AC Characteristics ReceiverSi4421 AC Characteristics Others Si4421AC Characteristics Transmitter AC Characteristics Turn-on/TurnaroundtimingsNote 10 By design Si4421Si4421 CONTROL INTERFACE Timing SpecificationTiming Diagram Control Commands Control Register Default ValuesSi4421 Si4421 Description of the Control CommandsConfiguration Setting Command 2. Power Management CommandSi4421 Logic connections between power control bitsSi4421 Frequency Setting Command4. Data Rate Command 5. Receiver Control CommandSi4421 VDI Logic DiagramSi4421 6. Data Filter CommandSi4421 7.FIFO and Reset Mode CommandSi4421 8. Synchron Pattern Command9. Receiver FIFO Read Command 10. AFC CommandBit 5-4rl1 to rl0 Si442111. TX Configuration Control Command Frequency Setting CommandSi4421 13. Transmitter Register Write Command 12. PLL Setting CommandSi4421 14. Wake-UpTimer Command 15.Low Duty-CycleCommandSi4421 Si4421 Vlb= 2.25 + V · 0.1 V Clock divider configuration17. Status Read Command Si4421Bit Name Si4421 INTERRUPT HANDLING Si4421 TX REGISTER BUFFERED DATA TRANSMISSIONTypical TX register usage Si4421RECOMMENDED PACKET STRUCTURES Si4421 RX FIFO BUFFERED DATA READBit Rate 38.4 kbps Si4421 CRYSTAL SELECTION GUIDELINESBit Rate 2.4 kbps Bit Rate 9.6 kbpsSi4421 RX-TXALIGNMENT PROCEDURES Si4421 RESET MODES Si4421 Sensitive Reset Enabled, Ripple on VddFIFO and Reset Mode Command page SW Reset CommandChannel Selectivity and Blocking Si4421 TYPICAL PERFORMANCE CHARACTERISTICSSi4421 BER Curves in 433 MHz BandBER Curves in 868 MHz Band 434 MHz Si4421Frequency Dependent Component Values Si4421 REFERENCE DESIGNSSchematics Evaluation Board with 50 Ohm Matching NetworkPCB Layout Top View Bottom View Si4421Frequency Dependent Component Values SchematicsSi4421 Evaluation Board with Resonant PCB Antenna BIFASi4421 PCB Layout Antenna designed for 868/915 MHz bandTop View Bottom View Si4421 PACKAGE INFORMATION 16-pinTSSOPSee Detail “A” Section B-B Related Resources RELATED PRODUCTS AND DOCUMENTSSi4421 Universal ISM Band FSK Transceiver Demo Boards and Development KitsSi4421