Silicon Laboratories SI4421 manual Si4421, Note 10 By design

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Note 10: By design

Si4421

Note 1: Measured with disabled clock output buffer

Note 2: Not using a 10 MHz crystal is allowed but not recommended because all crystal referred timing and frequency parameters will change accordingly

Note 3: See the BER diagrams in the measurement results section (page 37) for detailed information

Note 4: See reference design with 50 Ohm Matching Network (page 39) for details

Note 5: See reference design with Resonant PCB Antenna (BIFA) on page 41 for details

Note 6: Optimal antenna admittance/impedance:

Si4421	Yantenna [mS]	Zantenna [Ohm]		Lantenna [nH]
433 MHz	2 – j5.9	52	+ j152	62
868 MHz	1.2 - j11.9	7.8 + j83		15.4
915 MHz	1.49 - j12.8	9	+ j77	13.6

Note 7: Adjustable in 8 steps

Note 8: During the Power-On Reset period, commands are not accepted by the chip. In case of software reset (see Wake-Up Timer Command, page 25) the reset timeout is 0.25ms typical.

Note 9: The crystal oscillator start up time strongly depends on the capacitance seen by the oscillator. Low capacitance and low ESR crystal is recommended with low parasitic PCB layout design.

Note 10: By design

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Contents FUNCTIONAL BLOCK DIAGRAM FEATURESDESCRIPTION TYPICAL APPLICATIONSDETAILED FEATURE-LEVELDESCRIPTION RF Power Amplifier PAData Filtering and Clock Recovery Si4421Low Battery Voltage Detector Wake-UpTimerData Validity Blocks Crystal OscillatorSi4421 PACKAGE PIN DEFINITIONS NameType FunctionSi4421 Internal Pin ConnectionsName Internal connectionPIN6 Logic Diagram FSK / DATA / nFFS PIN10 Logic Diagram nRES I/ONote These pins can be left floating Si4421Si4421 Typical ApplicationRecommended supply decoupling capacitor values Pin Function vs. Operation ModeSi4421 GENERAL DEVICE SPECIFICATIONS Absolute Maximum Ratings non-operatingRecommended Operating Range ELECTRICAL SPECIFICATION DC CharacteristicsSi4421 AC Characteristics PLL parameters AC Characteristics ReceiverSi4421 Si4421 AC Characteristics TransmitterAC Characteristics Turn-on/Turnaroundtimings AC Characteristics OthersSi4421 Note 10 By designSi4421 CONTROL INTERFACE Timing SpecificationTiming Diagram Control Commands Control Register Default ValuesSi4421 Description of the Control Commands Configuration Setting Command2. Power Management Command Si4421Logic connections between power control bits Si4421Frequency Setting Command 4. Data Rate Command5. Receiver Control Command Si4421VDI Logic Diagram Si44216. Data Filter Command Si44217.FIFO and Reset Mode Command Si44218. Synchron Pattern Command 9. Receiver FIFO Read Command10. AFC Command Si4421Si4421 Bit 5-4rl1 to rl011. TX Configuration Control Command Frequency Setting CommandSi4421 13. Transmitter Register Write Command 12. PLL Setting CommandSi4421 14. Wake-UpTimer Command 15.Low Duty-CycleCommandSi4421 Vlb= 2.25 + V · 0.1 V Clock divider configuration Si442117. Status Read Command Si4421Bit Name Si4421 INTERRUPT HANDLING TX REGISTER BUFFERED DATA TRANSMISSION Si4421Si4421 Typical TX register usageSi4421 RX FIFO BUFFERED DATA READ RECOMMENDED PACKET STRUCTURESSi4421 CRYSTAL SELECTION GUIDELINES Bit Rate 2.4 kbpsBit Rate 9.6 kbps Bit Rate 38.4 kbpsSi4421 RX-TXALIGNMENT PROCEDURES Si4421 RESET MODES Sensitive Reset Enabled, Ripple on Vdd FIFO and Reset Mode Command pageSW Reset Command Si4421Si4421 TYPICAL PERFORMANCE CHARACTERISTICS Channel Selectivity and BlockingSi4421 BER Curves in 433 MHz BandBER Curves in 868 MHz Band Si4421 434 MHzSi4421 REFERENCE DESIGNS SchematicsEvaluation Board with 50 Ohm Matching Network Frequency Dependent Component ValuesSi4421 PCB Layout Top View Bottom ViewSchematics Si4421Evaluation Board with Resonant PCB Antenna BIFA Frequency Dependent Component ValuesSi4421 PCB Layout Antenna designed for 868/915 MHz bandTop View Bottom View Si4421 PACKAGE INFORMATION 16-pinTSSOPSee Detail “A” Section B-B RELATED PRODUCTS AND DOCUMENTS Si4421 Universal ISM Band FSK TransceiverDemo Boards and Development Kits Related ResourcesSi4421