Silicon Laboratories SI4421 manual Si4421, Frequency Setting Command, Data Rate Command

Page 17

Frequency Setting Command

Si4421

3.		Frequency Setting Command

	Bit		15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0	POR
			1	0	1	0	f11	f10	f9	f8	f7	f6	f5	f4	f3	f2	f1	f0	A680h

The 12-bit parameter F (bits f11 to f0) should be in the range of 96 and 3903. When F value sent is out of range, the previous value is kept. The synthesizer center frequency f0 can be calculated as:

f0 = 10 · C1 · (C2 + F/4000) [MHz]

The constants C1 and C2 are determined by the selected band as:

Band [MHz]	C1	C2
433	1	43
868	2	43
915	3	30

Band	Minimum Frequency	Maximum Frequency	PLL Frequency Step
433 MHz	430.2400 MHz	439.7575 MHz	2.5 kHz
868 MHz	860.4800 MHz	879.5150 MHZ	5.0 kHz
915 MHz	900.7200 MHz	929.2725 MHz	7.5 kHz

4. Data Rate Command

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0	POR
	1	1	0	0	0	1	1	0	cs	r6	r5	r4	r3	r2	r1	r0	C623h

The actual bit rate in transmit mode and the expected bit rate of the received data stream in receive mode is determined by the 7-bit parameter R (bits r6 to r0) and bit cs.

BR = 10000 / 29 / (R+1) / (1+cs · 7) [kbps]

In the receiver set R according to the next function:

R= (10000 / 29 / (1+cs · 7) / BR) – 1, where BR is the expected bit rate in kbps.

Apart from setting custom values, the standard bit rates from 600 bps to 115.2 kbps can be approximated with small error.

Data rate accuracy requirements:
Clock recovery in slow mode: ΔBR/BR < 1/(29 · Nbit )	Clock recovery in fast mode: ΔBR/BR < 3/(29 · Nbit )

BR is the bit rate set in the receiver and ΔBR is the bit rate difference between the transmitter and the receiver. Nbit is the maximum number of consecutive ones or zeros in the data stream. It is recommended for long data packets to include enough 1/0 and 0/1 transitions, and to be careful to use the same division ratio in the receiver and in the transmitter.

5. Receiver Control Command

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0	POR
	1	0	0	1	0	p16	d1	d0	i2	i1	i0	g1	g0	r2	r1	r0	9080h

Bit 10 (p16): Pin 16 function select

p16

0

1

Function of pin 16

Interrupt input

VDI output

17

Image 17

Contents FEATURES FUNCTIONAL BLOCK DIAGRAMDESCRIPTION TYPICAL APPLICATIONSRF Power Amplifier PA DETAILED FEATURE-LEVELDESCRIPTIONData Filtering and Clock Recovery Si4421Wake-UpTimer Low Battery Voltage DetectorData Validity Blocks Crystal OscillatorName Si4421 PACKAGE PIN DEFINITIONSType FunctionInternal Pin Connections Si4421Name Internal connectionPIN10 Logic Diagram nRES I/O PIN6 Logic Diagram FSK / DATA / nFFSNote These pins can be left floating Si4421Typical Application Si4421Recommended supply decoupling capacitor values Pin Function vs. Operation ModeRecommended Operating Range Si4421 GENERAL DEVICE SPECIFICATIONSAbsolute Maximum Ratings non-operating Si4421 ELECTRICAL SPECIFICATIONDC Characteristics Si4421 AC Characteristics PLL parametersAC Characteristics Receiver AC Characteristics Transmitter Si4421AC Characteristics Turn-on/Turnaroundtimings AC Characteristics OthersNote 10 By design Si4421Timing Diagram Si4421 CONTROL INTERFACETiming Specification Si4421 Control CommandsControl Register Default Values Configuration Setting Command Description of the Control Commands2. Power Management Command Si4421Si4421 Logic connections between power control bits4. Data Rate Command Frequency Setting Command5. Receiver Control Command Si4421Si4421 VDI Logic DiagramSi4421 6. Data Filter CommandSi4421 7.FIFO and Reset Mode Command9. Receiver FIFO Read Command 8. Synchron Pattern Command10. AFC Command Si4421Bit 5-4rl1 to rl0 Si4421Si4421 11. TX Configuration Control CommandFrequency Setting Command Si4421 13. Transmitter Register Write Command12. PLL Setting Command Si4421 14. Wake-UpTimer Command15.Low Duty-CycleCommand Si4421 Vlb= 2.25 + V · 0.1 V Clock divider configurationBit Name 17. Status Read CommandSi4421 Si4421 INTERRUPT HANDLING Si4421 TX REGISTER BUFFERED DATA TRANSMISSIONTypical TX register usage Si4421RECOMMENDED PACKET STRUCTURES Si4421 RX FIFO BUFFERED DATA READBit Rate 2.4 kbps Si4421 CRYSTAL SELECTION GUIDELINESBit Rate 9.6 kbps Bit Rate 38.4 kbpsSi4421 RX-TXALIGNMENT PROCEDURES Si4421 RESET MODES FIFO and Reset Mode Command page Sensitive Reset Enabled, Ripple on VddSW Reset Command Si4421Channel Selectivity and Blocking Si4421 TYPICAL PERFORMANCE CHARACTERISTICSBER Curves in 868 MHz Band Si4421BER Curves in 433 MHz Band 434 MHz Si4421Schematics Si4421 REFERENCE DESIGNSEvaluation Board with 50 Ohm Matching Network Frequency Dependent Component ValuesPCB Layout Top View Bottom View Si4421Si4421 SchematicsEvaluation Board with Resonant PCB Antenna BIFA Frequency Dependent Component ValuesTop View Bottom View Si4421PCB Layout Antenna designed for 868/915 MHz band See Detail “A” Section B-B Si4421 PACKAGE INFORMATION16-pinTSSOP Si4421 Universal ISM Band FSK Transceiver RELATED PRODUCTS AND DOCUMENTSDemo Boards and Development Kits Related ResourcesSi4421