Si4421
Typical Application
Typical application with FIFO usage
|
|
|
| VDD |
|
|
|
|
|
|
|
| C1 |
|
|
|
|
|
|
|
| 2.2u |
|
|
|
|
|
|
|
|
|
|
| C3 | C2 |
|
|
|
|
|
|
|
| 10n |
P7 | VDI | (optional) |
|
|
| TP | C4 |
|
SDI |
| 1 |
| 16 |
| |||
P6 |
|
|
| |||||
|
|
| 2.2n (opt.) |
| ||||
SCK |
| 2 |
| 15 |
|
| ||
P5 |
|
|
|
|
| |||
nSEL |
| 3 |
| 14 |
|
|
| |
P4 |
|
|
|
|
| |||
SDO |
| 4 |
| 13 |
|
|
| |
P3 |
| Si4421 |
|
|
| |||
nIRQ |
| 5 | 12 |
|
|
| ||
P2 |
|
|
|
| ||||
nFFS | (optional)* | 6 |
| 11 |
|
|
| |
P1 |
|
|
|
| ||||
FFIT | (optional)* | 7 |
| 10 |
|
|
| |
P0 |
|
|
|
| ||||
CLK | (optional) | 8 |
| 9 |
|
|
| |
CLKin |
|
|
| PCB | ||||
|
|
|
|
|
|
| ||
| nRES | (optional) |
|
|
|
|
| Antenna |
nRESin |
|
|
|
| X1 |
| ||
|
|
|
|
|
|
| ||
|
|
|
|
|
|
| 10MHz |
|
|
|
|
| Note: * Connections needed only in time critical applications |
Recommended supply decoupling capacitor values
C2 and C3 should be 0603 size ceramic capacitors to achieve the best supply decoupling.
Band [MHz] | C1 | C2 | C3 |
433 | 2.2µF | 10nF | 220pF |
868 | 2.2µF | 10nF | 47pF |
915 | 2.2µF | 10nF | 33pF |
Pin Function vs. Operation Mode
Property | C1 | C2 | C3 |
SMD size | A | 0603 | 0603 |
Dielectric | Tantalum | Ceramic | Ceramic |
| Mode |
| Bit setting |
| Function |
| Pin 6 |
| Pin 7 |
| Transmit |
| el = 0 |
| Internal TX data register disabled |
| TX data input |
| Not used |
|
|
|
|
|
|
|
| ||
|
| el = 1 |
| Internal TX data register enabled |
| nFFS input |
| ||
|
|
|
|
|
|
| |||
|
|
|
|
| (TX data register can be accessed) |
|
| ||
|
|
|
|
|
|
|
|
| |
|
|
| ef = 0 |
| Receiver FIFO disabled |
| RX data output |
| RX data clock |
| Receive |
|
|
|
| output | |||
|
|
|
|
|
|
|
| ||
|
| ef = 1 |
| Receiver FIFO disabled |
| nFFS input |
| FFIT output | |
|
|
|
|
|
| ||||
|
|
|
|
| (RX data FIFO can be accessed) |
| |||
|
|
|
|
|
|
|
|
|
The el and ef bits can be found in the Configuration Setting Command on page 15. Bit el enables the internal TX data register. Bit ef enables the FIFO mode.
7