Acer AS8950G manual Post Codes, Post Code Range Phase

Post Codes

The following are the InsydeH2O™ Functionality POST code tables. The components of the POST code table includes: SEC phase, PEI phase, DXE phase, BDS phase, CSM functions, S3 functions and ACPI functions.

Table 4-1. POST Code Range

Phase		POST Code Range
SEC 0x0	1	- 0x0F
PEI 0x7	0	- 0x9F
DXE 0x4	0	- 0x6F
BDS 0x1	0	- 0x3F
SMM 0	xA0 - 0xBF
S3 0	xC0 - 0xCF
ASL	0x51	– 0x55
	0xE1 – 0xE4
PostBDS	0xF9 – 0xFE
InsydeH2ODDT™ Reserve	0xD0 – 0xD7
OEM Reserve	0xE8 – 0xEB
Reserved	0xD8 – 0xE0
	0xE5 – 0xE7
	0xEC – 0xF8

Table 4-2. SEC Phase POST Code Table:

Functionality Name (Include\	Phase	PostCode	Description
PostCode.h)
SEC_SYSTEM_POWER_ON SEC		01	CPU power on and switch to
			Protected mode
SEC_BEFORE_MICROCODE	SEC	02	Patching CPU microcode
_PATCH
SEC_AFTER_MICROCODE_P	SEC	03	Setup Cache as RAM
ATCH
SEC_ACCESS_CSR*	SEC 04		PCIE MMIO Base Address initial
SEC_GENERIC_MSRINIT*	SEC 05		CPU Generic MSR initialization
SEC_CPU_SPEEDCFG*	SEC	06 Setup	CPU speed
SEC_SETUP_CAR_OK	SEC	07	Cache as RAM test

4-16 Troubleshooting