Application Programs 71
Module in slot 2:
The module is connected to + 5 V on the DUT.
The initial voltage setting is 0 V.
The module listens for a backplane TTL Trigger.
The trigger delay is programmed to 50 ms.
Upon receipt of the trigger, the module waits the trigger delay time and then goes to 5 V.
Variations On This Implementation
1. The modules could be set to generate SRQ when the last module (+ 5 V) reaches its final output value. This would notify
the computer that power has been applied to the DUT and the testing can begin.
2. To provide a delay between the application of the + 15 V and the - 15 V bias, you can program different trigger delays
into modules 2 and 3. The delay time will be relative to the module in slot 0.
3. To get all three modules to apply power to the DUT at the same time, simply eliminate the trigger delay on the + 5 V
module.
4. When modules need to be connected in parallel to increase current, they will also need to be synchronized so that they all
apply power simultaneously. To get modules in parallel to apply power at the same time, use the approach described in
this example, but eliminate any trigger delays.
Figure B1-1. Block Diagram of Application #1