Language Dictionary 45
STAT:QUES?
This command returns the value of the Questionable Event register. The Event register is a read-only register which holds
(latches) all events that are passed by the Questionable NTR and/or PTR filter. Reading the Questionable Event register
clears it. Query Syntax STATus:QUEStionable[:EVENt]?
Parameters (None)
Returned Parameters <NR1> (Register Value)
Examples STAT:QUES:EVEN?
Related Commands *CLS STAT:QUES:NTR STAT:QUES:PTR
STAT:QUES:COND?
This query returns the value of the Questionable Condition register. That is a read-only register which holds the real-time
(unlatched) questionable status of the power module.
Query Syntax STATus:QUEStionable:CONDition?
Example STAT: QUES: COND?
Returned Parameters <NR1> (Register value)
Related Commands (None)
STAT:QUES:ENAB
This command sets or reads the value of the Questionable Enable register. This register is a mask for enabling specific bits
from the Questionable Event register to set the questionable summary (QUES) bit of the Status Byte register. This bit (bit
3) is the logical OR of all the Questionable Event register bits that are enabled by the Questionable Status Enable register.
Command Syntax STATus:QUEStionable:ENABle <NRf>
Parameters 0 to 32727
Suffix (None)
Default Value 0
Example STAT:QUES:ENAB 18
Query Syntax STATus:QUEStionable:ENABle?
Returned Parameters <NR1> (Register value)
Related Commands STAT:QUES:EVEN?
STAT:QUES:NTR|PTR Commands
These commands allow the values of the Questionable NTR (Negative-Transition) and PTR (Positive-Transition) registers
to be set or read. These registers serve as polarity filters between the Questionable Enable and Questionable Event registers
to cause the following actions:
• When a bit of the Questionable NTR register is set to 1, then a 1-to-0 transition of the corresponding bit of the
Questionable Condition register causes that bit in the Questionable Event register to be set.
• When a bit of the Questionable PTR register is set to 1, then a 0-to-I transition of the corresponding bit in the
Questionable Condition register causes that bit in the Questionable Event register to be set.
• If the same bits in both NTR and PTR registers are set to 1, then any transition of that bit at the Questionable
Condition register sets the corresponding bit in the Questionable Event register.
• If the same bits in both NTR and PTR registers are set to 0, then no transition of that bit at the Questionable
Condition register can set the corresponding bit in the Questionable Event register.
Note Setting a bit in the PTR or NTR filter can of itself generate positive or negative events in the
corresponding Questionable Event register.