Agilent Technologies 66lxxA Ese, Bit Configuration of Standard Event Status Enable Register, Esr?

Models: 66lxxA

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If *CLS immediately follows a program message terminator (<NL>), then the output queue and the MAV bit are also cleared.

Command Syntax

*CLS

Parameters

(None)

Query Syntax

(None)

*ESE

Meaning and Type

Event Status Enable Device Status

Description

This command programs the Standard Event Status Enable register bits. The programming determines which events of the Standard Event Status Event register (see *ESR?) are allowed to set the ESB (Event Summary Bit) of the Status Byte register. A "1" in the bit position enables the corresponding event. All of the enabled events of the Standard Event Status Event register are logically ORed to cause the Event Summary Bit (ESB) of the Status Byte register to be set. See "Chapter 4 - Status Reporting" for descriptions of all three registers.

Bit Position

Bit Name

Bit Weight

Bit Configuration of Standard Event Status Enable Register

7

6

5

4

3

2

1

PON

0

CME

EXE

DDE

QYE

0

128

64

32

16

8

4

2

0

OPC

1

CME = Command error; DDE = Device-dependent error; EXE = Execution error; OPC = Operation complete; PON Power-on; QYE = Query error

Command Syntax

*ESE <NRf>

Parameters

0 to 255

 

Power On Value

(See *PSC)

Suffix

(None)

 

Example

*ESE 129

 

Query Syntax

*ESE?

 

Returned Parameters

<NR1>

(Register value)

Related Commands

*ESR?

*PSC *STB?

If PSC is programmed to 0, then the *ESE command causes a write cycle to nonvolatile memory. The nonvolatile memory has a finite maximum number of write cycles (see in the power module User’s Guide). Programs that repeatedly cause write cycles to nonvolatile memory can eventually

exceed the maximum number of write cycles and may cause the memory to fail.

*ESR?

Meaning and Type

Event Status Register Device Status

Description

This query reads the Standard Event Status Event register. Reading the register clears it. The bit configuration of this register is the same as the Standard Event Status Enable register (*ESE). See "Chapter 4 - Status Reporting" for a detailed explanation of this register.

Query Syntax

*ESR?

 

Parameters

(None)

 

Returned Parameters

<NR1>

(Register binary value)

Related Commands

*CLS *ESE

*ESE? *OPC

Language Dictionary 25

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Agilent Technologies 66lxxA manual Ese, Bit Configuration of Standard Event Status Enable Register, Esr?