Agilent Technologies 66lxxA manual Stat Oper NTR 32 Stat Oper PTR, Statpres

STAT:OPER:NTRPTR Commands

These commands set or read the value of the Operation NTR (Negative-Transition) and PTR (Positive-Transition) registers. These registers serve as polarity filters between the Operation Enable and Operation Event registers to cause the following actions:

∙When a bit in the Operation NTR register is set to 1, then a 1-to-0 transition of the corresponding bit in the Operation Condition register causes that bit in the Operation Event register to be set.

∙When a bit of the Operation PTR register is set to 1, then a 0-to-I transition of the corresponding bit in the Operation Condition register causes that bit in the Operation Event register to be set.

∙If the same bits in both NTR and PTR registers are set to 1, then any transition of that bit at the Operation Condition register sets the corresponding bit in the Operation Event register.

∙If the same bits in both NTR and PTR registers are set to 0, then no transition of that bit at the Operation Condition register can set the corresponding bit in the Operation Event register.

Note	Setting a bit in the value of the PTR or NTR filter can of itself generate positive or negative events in the
	corresponding Operation Event register.
	Command Syntax	STATus:OPERation:NTRansition <Nrf>
		STATus:OPERation:PTRansition <NRf>
	Parameters	0 to 32727
	Suffix	(None)
	Default Value	0
	Examples	STAT: OPER: NTR 32 STAT: OPER: PTR 1312
	Query Syntax	STAT:OPER:NTR? STAT:OPER:PTR?
	Returned Parameters	<NR1> (Register value)
	Related Commands	STAT:OPER:ENAB

STAT:PRES

This command sets all defined bits in the Status Subsystem PTR registers and clears all bits in the subsystem NTR and Enable registers. STAT:OPER:PTR is set to 1313 and STAT:QUES:PTR is set to 1555.

Command Syntax	STATus:PRESet
Parameters	(None)
Examples	STAT:PRES
Query Syntax	(None)
Related Commands	(None)

Status Questionable Registers

The bit configuration of all Status Questionable registers is as follows:

			Bit Configuration of Questionable Registers
Bit Position	15-11	10	9	8	7	6	5	4	3
Condition	NU	UNR	RI	NU	NU	NU	NU	OT	NU
Bit Weight		1024	512	256	128	64	32	16	8

2

NU

4

1

OC

2

0

OV

1

NU = (Not used); OC = Overcurrent protection circuit has tripped; OT = Overtemperature status condition exists; OV = Overvoltage protection circuit has tripped; RI = Remote inhibit is active; UNR = Power supply output is unregulated.

Note See "Chapter 4 - Status Reporting" for more explanation of these registers.

44 Language Dictionary