Stb?, Trg | Agilent Technologies 66lxxA guide

If *PSC is programmed to 0, then the *SRE command causes a write cycle to nonvolatile memory. The nonvolatile memory has a finite number of write cycles (see Table 1-2 in the power module User’s Guide). Programs that repeatedly write to nonvolatile memory can eventually exceed the maximum number of write cycles and may cause the memory to fail.

*STB?

Meaning and Type

Status Byte Device Status

Description

This query reads the Status Byte register, which contains the status summary bits and the Output Queue MAV bit. Reading the Status Byte register does not clear it. The input summary bits are cleared when the appropriate event registers are read (see “Chapter 4 - Status Reporting”) for more information). The MAV bit is cleared at power on or by *CLS.

A serial poll also returns the value of the Status Byte register, except that bit 6 returns Request for Service (RQS) instead of Master Status Summary (MSS). A serial poll clears RQS, but not MSS. When MSS is set, it indicates that the power module has one or more reasons for requesting service.

Bit Position

Condition

Bit Weight

7

OPER

128

Bit Configuration of Status Byte Register

6	5	4	3	2
MSS	ESB	MAV	QUES	2
MSS	ESB	MAV	QUES
(RQS)
64	32	16	8	4

1

2

2

0

2

1

ESB = Event status byte summary; M = Message available

MSS = Master status summary; OPER = Operation status summary;

QUES = Questionable status summary; RQS = Request for service

1Also represents RQS. 2These bits are always zero.

Query Syntax	*STB?
Returned Parameters	<NR1>	(Register binary value)
Related Commands	(None)

*TRG

Meaning and Type

Trigger Device Trigger

Description

This command generates a trigger to any subsystem that has BUS selected as its source (for example, TRIG:SOUR BUS, OUTP:TTLT:SOUR BUS). The command has the same affect as the Group Execute Trigger (<GET>) command.

Command Syntax	*TRG
Parameters	(None)
Query Syntax	(None)
Related Commands	ABOR CURR:TRIG INIT TRIG[:IMM] VOLT:TIUG

30 Language Dictionary

Image 29

Agilent Technologies 66lxxA manual Stb?, Bit Configuration of Status Byte Register, Trg

Contents

Programming Guide Agilent Part No Microfiche Part No Update April Safety Guidelines Contents Abor Status Reporting Error Messages Synchronizing Power Module Output Changes About This Guide IntroductionDocumentation Summary External References Downloading and Installing the Driver VXIplug&play Power Products Instrument DriversAccessing Online Help Supported Applications Introduction To Programming Gpib Capabilities Of The Power ModuleModule Gpib Address Introduction To Scpi RST *IDN? *SRE Voltlev 8.0 Prot 8.8 CURR? Volt LEV Prot Curr Outpprotdel Effect of Optional Headers Traversing the Command Tree OUTPUTPROTECTIONCLEARSTATUSOPERATIONCONDITION? Outputprotectionclear STATUSOPERATIONCONDITION?Voltagelevel 7PROTECTION 8CURRENTLEVEL 3MODE List Volttrig 7.5INIT*TRG Outp OFF*RCL 2OUTP on Numerical Data Formats Talking Formats SymbolListening Formats Suffixes and Multipliers Class Unit Unit with Multiplier Assign @PM3TO System Considerations Agilent Basic Controllers Error Handling Using the National Instruments Gpib Interface Sending the Command Volt 5 in C Sending the Command Volt 5 in Basic Receiving Module Data with Basic Receiving Data from the Module Receiving Module Data with C Introduction Language Dictionary CLS Description Of Common CommandsMeaning and Type Description ESE Bit Configuration of Standard Event Status Enable RegisterESE ESR? OPC? IDN?OPC PSC OPT? RST RCLRCL SRE SAVSRE TRG Bit Configuration of Status Byte RegisterSTB? TST? Description of Subsystem CommandsWAI Abor Calauto Subsystem Tree Diagram Calibration Subsystem Calcurr Calauto 1 Calauto OnceCalcurrlev Calpass Calstat CalsaveCalvolt Calvoltlev Curr CalvoltprotCurr 500 MA Currlev Currmode Currprotstat OFF CurrprotstatCurrtrig Currtrig 1200 MA Currlevtrig Listcoun Init Initcont 1 Initcont onListcoun Listcoun INF Listcurr Listdwel LISTCURRPOIN?LISTDWELPOIN? Liststep Listvolt 2.0,2.5,3.0 Listvolt MAX,2.5,MIN ListvoltLISTVOLTPOIN? MEASCURR? MEASVOLT? Outpprot Outp Outpstat ON,NORELAY Outprel Outpprotcle Outpprotdel 75E-1Outprelpol Norm Outpttlt 1 Outpttlt OFF OutpttltOutpttltlink Outpttltsour Link STATOPEREVEN? STATOPER?STATOPERCOND? Statoperenab Statpres Stat Oper NTR 32 Stat Oper PTR STATQUESEVEN? STATQUES?STATQUESCOND? Stat Ques COND? SYSTVERS? SYSTERR?Trigger Subsystem Trig Trigdel Trig Trig IMMTrigdel .25 Trigdel MAX Triglink Voltlev VoltVoltmode Voltmode List Voltmode FIX Volttrig 1200 MV Voltlevtrig VOLTSENSSOUR?Volttrig Link Parameter List Power Module Programming Parameters Status Register Bit Configuration Power Module Status StructureStatus Reporting Operation Status Group Questionable Status Group Bit Signal Bit Configurations of Status Registers MeaningStatus Questionable Commands Query Standard Event Status Group Power Module Status Model Location Of Event Handles Status Byte RegisterOutput Queue Examples Initial Conditions At Power On Statquesptr 18ENAB Statoperptr 5376ENABSTATOPEREVEN?QUESEVEN? Statoperptr 1024NTR Statoperenab 1024*SRE Model of Fixed-Mode Trigger Operation Synchronizing Power Module Output ChangesTrigger Subsystem Initiated State Delaying StateIdle State INITiateCONTinuous Command Model of List Mode Trigger OperationTrigger Status and Event Signals Output Change State Outpttltsour List Subsystem Automatically Repeating a List Listvolt 3.0,3.25,3.5,3.75 Listdwel 10,10,25,40Listcurr 2,3,12,15 Triggering a List Timing diagrams of Liststep Operation RI Remote Inhibit Subsystem DFI Discrete Fault Indicator SubsystemScpi Command Completion Power Module Hardware Error Messages Error MessagesSystem Error Messages Standard Event Status Register Error Bits 222 -223 -241 -310 -330 -350 -400 -410 -420 -430 Scpi Approved Commands Scpi Confirmed CommandsScpi Conformance Information Scpi Version Non-SCPI Commands Application Programs Application 1. Sequencing Multiple Modules During Power Up Variations On This Implementation Figure B1-1. Block Diagram of Application #1 Figure B1-2. Timing Diagram of Application #1 Enable Backplane TTL Trigger Drive Reset and Clear ModuleEnable Output Enable Response to Trigger Implementation Details How The MPS Implements The Solution MPS Set Up Figure B2-1. Block Diagram of Application #2 Enable TTL Trigger Drive When a CV-TO-CC Transition OccursEnable Response to TTL Trigger Start AT 15 Application 3. Controlling Output Voltage Ramp Up at Turn On Figure B3-1. Simulating a Slow Voltage Ramp Generating the Desired Voltage Ramp for Application #3 Start Voltage for Ramp Option BaseStop Voltage for Ramp Seconds Figure B4-1. Voltage Waveform for Application #4 Application 4. Providing Time-Varying Voltages Module set up Variations On This Implementation No Delay Before Protection Occurs Enable OCPEnable Detection of OC Condition Enables Detection on Positive TRANSITION, I.E Application 5. Providing Time-Varying Current Limiting Figure B5-1. Typical DUT Current vs. Time Implementation Details How The MPS Implements The Sequence Current Limit Data GO to 12 V When TriggeredDwell Time Data SET to GET Current from List Nominal 12 Application 6. Output Sequencing Paced by the Computer MPS Set Up Figure B6-1. Block Diagram of Application #6 Supply Limit Conditions These are the BiasTo be Tested Number of Bias Supply Limit C0MBINATIONS Return Overview Of Application Advantages/Benefits Of The MPS Solution Figure B7-1. Block Diagram of Application #7 When IT Completes the LIST. OPC Generates SRO When the Module Indicates SIC Step CompletedEnable SRQ Interrupt Enable Intr Identify Handler Subroutine Supplemental Information CMD$ = Initiate ‘ Enable Trigger to Start List CMD$ = Output on ‘ Enable Output‘ Conversion to Send Real Numbers Over the BUS CMD$ = Voltmode List ‘ SET to GET Voltage from List Waiting for Trigger BIT 5 of the Operation Status Register Call Iooutputs SLOTO, CMDS, LCONDITION.DATA = Wend If IBSTA% 0 then Goto ‘ AS Part of the Command String ‘ Disable Auto Serial Poll‘ Program N3.BAS ‘ INSTRUMENT.NAME$ = Sloto Stop ‘ General Error HandlerIf IBSTA% 0 then Goto Selected AS a Trigger Source Dwell = ramptime Application #3 Controlling Voltage Ramp UP AT Turn on To terminate the iooutputa Int error Char *badstring If error != EOl enabled for both read and write Strcatvlist, vpoint This is a generalized error checking routine Index Index Index Index Index United States Latin America Agilent Sales and Support Offices Manual Updates