Agilent Technologies E1470A user manual Table B-3. Status Register Bit Patterns read

CAUTION Registers have been documented as 8-bit bytes. If you access them using 16-bit transfers from a Motorola CPU, the high and low byte will be swapped. The E1406 uses Motorola CPUs. Motorola CPUs place the highest weighted byte in the lower memory location and the lower weighted byte in the higher memory address while Intel processors do just the opposite. VXI registers are memory-mapped. Thus, you will see this Motorola/Intel byte swap difference when doing register programming.

Manufacturer

Identification

Register

Device

Identification

Register

Status/Control Register

The Manufacturer Identification Register is a read-only register at address 00h (Most Significant Byte (MSB)) and 01h (Least Significant Byte (LSB)). Reading this register returns the Hewlett-Packard identification, FFFFh.

The Device Identification Register is a read-only register accessed at address 02h. Reading this register returns the module identification of 581 (245h).

The Card Status/Control Register is a read/write register accessed at address 04h. You read the Status Register and write to the Control Register.

Table B-3. Status Register Bit Patterns (read)

			Address b+04h								Address b+05h
15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	1	1	1	1	CDI0	CDI1	BSY	IEN	1	1	1	1	1	SR

SR (soft Reset): 0 = not in reset, 1 = held in reset state.

IEN: Main interrupt enable. Bit is set to 0 when interrupts are enabled; 1when interrupts are disabled.

BSY: Bit is set to 0 when module is busy - relays are settling. Bit is set to 1 if the module is not busy.

CDI0 and CDI1: When set to 0, indicates the relay assemblies are connected to the driver assembly. CDI0 is the right hand relay assembly, CDI1 is the left hand assembly. If either bit is set to a 1, the respective relay assembly is not installed.

Table B-4. Control Register Bit Pattern (write)

			Address b+04h								Address b+05h
15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	1	1	1	1	1	1	1	IEN	1	1	1	1	1	SR

SR (soft reset): Writing a “1” and then a “0” to this bit resets all relays on the module to their power-on/reset state.

IEN: Main interrupt enable. Writing a 1 to this bit causes an interrupt to be generated 16 msec after a value is written to any relay control register to indicate that a relay closure should be complete. At power-on/reset, this bit is set to 0.

Appendix B Register-Based Programming 45