Management Complex: MPC8548 Processor

Reset Diagram

Figure 4-3:MPC8548 Reset Diagram

33MHz

3_3V_MP

PQ_HRESET*

L_PAYLD_EN

3_3V_PWRGD

2_5V_PWRGD

1_8V_PWRGD

1_2V_PWRGD

1_0V_PWRGD

PQ_CORE_PWRGD* P1_CORE_PWRGD* P2_CORE_PWRGD*

IPMP

CPLD

 

Reset to IPMC

 

PWRGD_OK

 

PQ_SRESET* MPC8548

Management

PQ_TRST* Processor

RESET_INDICATION*

I2C1

I2C2

FLASH_RST* NOR Flash 4M x 16

3_3V_MP Front 3_3V

Panel

 

 

 

 

 

3_3V_MP

 

 

 

 

 

Reset

 

Voltage

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Monitor

 

 

 

POR_RST*

IPMC Reset

 

 

 

 

Voltage

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Delay

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Monitor

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Delay

 

POIPMCRST*

 

 

 

 

 

 

 

 

 

 

BOOT_REDIR

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

KSL

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

CPLD

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

BOOT_SEL0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

I2C IO

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

BOOT_SEL1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Port

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

RST*POIPMC

 

__SDAI2CPRIV

 

 

 

L_PAYLOAD_RST*

 

 

 

 

 

 

 

 

3_3V_MP

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Hot Swap

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Switch

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

E_HANDLE

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

IPMC

NAND_RST* NAND NAND_WARM_RST* Flash

1GB x 16

PQ_DDR_RST*

 

 

 

 

 

PQ DDR2

 

 

 

 

 

SODIMM

 

 

 

 

 

 

 

 

 

 

Module

 

TSEC1_RST*

 

 

Ethernet Port

 

 

 

 

 

BCM5461S

 

 

 

 

 

 

 

 

 

 

 

TSEC2_RST*

 

 

Ethernet Port

 

 

 

 

 

BCM5461S

 

 

 

 

 

 

 

 

 

 

FP1_RST*

 

 

Ethernet Port

 

 

 

 

 

BCM5461S

 

 

 

 

 

 

 

 

 

 

 

 

48A_OK

 

 

BC_RST*

Ethernet Port

48B_OK

 

 

 

 

 

 

BCM5482

 

 

 

 

 

 

 

 

 

 

 

 

 

 

4-6

ATCA-9305 User’s Manual

10009109-01

Page 62
Image 62
Emerson ATCA-9305 user manual Reset Diagram, Ipmp Cpld

ATCA-9305 specifications

The Emerson ATCA-9305 is a high-performance AdvancedTCA (ATCA) chassis designed to meet the demanding requirements of telecommunications and IT infrastructure. With a focus on scalability, reliability, and flexibility, this equipment is ideal for service providers and enterprises looking to deploy robust applications in a variety of environments.

One of the main features of the ATCA-9305 is its support for high-density blade configurations. The chassis can accommodate up to 14 ATCA blades, enabling the deployment of powerful processing units, communication modules, and storage solutions. This level of density not only maximizes space but also minimizes power consumption, which is crucial for reducing operational costs in large-scale deployments.

The ATCA-9305 is built with a focus on advanced thermal management and redundancy. It employs a sophisticated cooling architecture that ensures optimal airflow across the chassis, preventing overheating during operation. Additionally, the chassis features hot-swappable fans and power supplies, which means that components can be replaced without interrupting the overall system performance. This capability enhances uptime and reliability, which is essential for mission-critical applications.

Another notable characteristic of the ATCA-9305 is its support for various interconnect technologies. The chassis provides robust backplane options that facilitate high-bandwidth communication between blades. It supports Ethernet, PCI Express, and Serial RapidIO, allowing for seamless integration with existing infrastructure and future technologies. This flexibility enables organizations to adapt to changing market demands and technological advancements.

Security features are also a prominent aspect of the ATCA-9305. The chassis incorporates hardware-based security modules that enhance data integrity and protect sensitive information. This is particularly important for service providers who must adhere to strict regulatory compliance standards.

In terms of management and monitoring, the ATCA-9305 is equipped with advanced management capabilities. It supports AdvancedTCA Management Interface (IPMI) and other monitoring protocols, allowing administrators to easily oversee the health and performance of the entire system. This level of visibility aids in proactive maintenance and troubleshooting, effectively reducing downtime.

In conclusion, the Emerson ATCA-9305 is a powerful and versatile chassis that stands out due to its high-density configuration, advanced thermal management, diverse interconnect technology support, robust security features, and comprehensive management capabilities. Its design is tailored for the evolving needs of telecommunications and data center environments, making it a valuable asset for any organization looking to enhance its infrastructure.