Freescale Semiconductor, Inc.

Appendix

MMDS Commands

A bit set in both the clips and masks sets the trigger to high (-H). A bit clear in clips, but set in masks, sets the trigger to low (-L). A bit clear in a mask means that the trigger does not depend on the state of the clip.

Examples:

STA 0x1000

Sets analyzer trigger A to match accesses at address $1000.

STB , 4

Sets analyzer trigger B to match accesses with a value of 4, at any address.

STC 8 20..40

Sets analyzer triggers C and D to match accesses having a value from 20 to 40, at address 8.

STC 8..10 20

Sets analyzer triggers C and D to match accesses having the value 20, at any address from 8 to 10.

NOTE

Mask bits that have the value 0 are “Don’t Care” bits: for those

 

positions of an address, data, or clip value, either a 0 or a 1 trips the

 

trigger. Mask bits set to 1 identify positions whose values must match

 

those of the specified address, data, or clip value. For Address

 

0xC000, Mask 0xFFFC, loading any of four values in the address bus

 

would trip the trigger: 0xC000, 0xC001, 0xC002, or 0xC003. For

 

Address 0x00B0, Mask 0xFFF0, any address in the range

 

0x00B0..0x00BF would trip the trigger.

 

 

TD

A.1.2.7 Short Description

trigger disable.

A.1.2.8 Syntax

TD list *

A–64

MMDS0508 Target Interface

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Freescale Semiconductor MMDS0508 manual Examples