Host Interface
4.1 Pin Assignment
The table below lists pin assignments of the interface connector.
Although the MCG3xxxAP has
Table 4.1 Connector pin assignments (1/2)
Description | PIN | Signal name |
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Reset | 1 | RESET- |
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Ground | 2 | Ground |
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Data bus bit 7 | 3 | DD7 |
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Data bus bit 8 | 4 | DD8 |
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Data bus bit 6 | 5 | DD6 |
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Data bus bit 9 | 6 | DD9 |
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Data bus bit 5 | 7 | DD5 |
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Data bus bit 10 | 8 | DD10 |
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Data bus bit 4 | 9 | DD4 |
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Data bus bit 11 | 10 | DD11 |
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Data bus bit 3 | 11 | DD3 |
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Data bus bit 12 | 12 | DD12 |
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Data bus bit 2 | 13 | DD2 |
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Data bus bit 13 | 14 | DD13 |
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Data bus bit 1 | 15 | DD1 |
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Data bus bit 14 | 16 | DD14 |
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Data bus bit 0 | 17 | DD0 |
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Data bus bit 15 | 18 | DD15 |
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Ground | 19 | Ground |
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(keypin) | 20 | Reserved |
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DMA Request | 21 | DMARQ |
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Ground | 22 | Ground |
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I/O Write | 23 | DIOW- |
Stop during Ultra DMA data bursts |
| STOP |
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Ground | 24 | Ground |
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