Self-test log data structure | Hitachi HTS543280L9A300 specs

5K320 SATA OEM Specification

14.40.6Self-test log data structure

The following defines the 512 bytes that make up the Self-test log sector. All multi-byte fields shown in these data structures follow the ATA/ATAPI-7 specifications for byte ordering.

Description

Data structure revision

Self-test number

Self-test execution status

Life time power on hours

Self-test failure check point

LBA of first failure

Vendor specific

...

Vendor specific

Self-test log pointer

Reserved

Data structure checksum

Note: n is 0 through 20

Bytes	Offset
2	00h
1	n*18h+02h
1	n*18h+03h
2	n*18h+04h
1	n*18h+06h
4	n*18h+07h
15	n*18h+0Bh

2	1FAh
1	1FCh
2	1FDh
1	1FFh
512

Table 122 Self -test log data structure

The data structure contains the descriptor of Self-test that the device has performed. Each descriptor i s 24 bytes long and the self-test data structure is capable to contain up to 21 descriptors.

After 21 descriptors has been recorded, the oldest descriptor will be overwritten with new descriptor.

Self-test log pointer points the most recent descriptor. W hen there is no descriptor the value is 0. When there is descriptor(s) the value is 1 through 21.

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Image 158

Hitachi HTS543280L9A300, HTS543212L9SA00 manual Self-test log data structure

Contents

Hitachi Travelstar 5K320 Copyright Hitachi Global Storage Technologies Table of Contents 11.6 List of Figures List of Tables 5K320 Sata OEM Specification 5K320 Sata OEM Specification 5K320 Sata OEM Specification General Introduction Abbreviations EEC PIO General caution Drive handling precautionsReferences Outline of the drive Part 1 Functional Specification Control Electronics Head disk assembly dataFixed disk subsystem description Formatted capacity by model number Fixed disk characteristicsFormatted capacity by model number Cylinder allocation Data sheetData sheet Cylinder allocation Performance characteristics Performance characteristicsCommand overhead Full stroke seek Mechanical positioningAverage seek time including settling Average latency Drive ready time Drive ready time Adaptive power save control Mode transition timeOperating mode at power on Operating mode Data integrity Data loss on power offWrite safety Write Cache Automatic reallocation Error recoveryData buffer test ECC Environment SpecificationTemperature and humidity Corrosion test Magnetic flux density limits Radiation noiseConductive noise DC power requirements Requirements Power consumption efficiency Power consumption efficiency Data reliability Service life and usage conditionReliability Failure prediction S.M.A.R.T Power switch design considerations Preventive maintenanceRequired Power-Off Sequence Load/unload Test considerations Physical dimensions and weight Mechanical specificationsPhysical dimensions and weight Mounting hole locations Load/unload mechanism Connector descriptionMounting orientation Random vibration Vibration and shockOperating vibration Swept sine vibration Nonoperating shock Nonoperating vibrationOperating shock Acoustics Sound power levelWeighted sound power Discrete tone penalty Identification labels Electromagnetic compatibility Substance restriction requirements SafetyPackaging Cabling Electrical interface specificationsInterface connector 1 TX+ / TX Signal definitionsInterface connector pins and I/O signals 2 RX+ / RX 5K320 Sata OEM Specification Out of band signaling M R E S E T / C O M in IT M W a K E 5K320 Sata OEM Specification Part 2 Interface Specification Terminology GeneralIntroduction Interrupt request Device or Host Registers Deviations from StandardPhysical Interface Device Control Register Command registerRegister naming convention Register naming convention and correspondence Error Register Error RegisterFeatures Register Device Register LBA Mid Register LBA High RegisterLBA Low Register Sector Count Register Corr COR General Operation Descriptions Reset ResponseReset Response Table Register Initialization Diagnostic Codes Diagnostic and Reset considerationsDefault Register Values Reset error register values Device’s behavior by ATA commands Power-off considerationsRequired power-off sequence Emergency unload Logical CHS Addressing Mode Sector Addressing ModePower Management Feature LBA Addressing Mode Standby/Sleep command completion timing Power ModePower Management Commands Interface Capability for Power Modes Active Idle mode Initial Power Mode at Power OnPerformance Idle mode Low Power Idle mode Transition Time Interface Power Management Mode Slumber and Partial12.8 S.M.A.R.T. Function Attributes Security Mode Feature Set Security Level PasswordMaster Password Revision Code Operation example Operation from POR after User Password is set Initial Setting User Password Lost Usual Operation Command Table Attempt limit for Security Unlock command Command table for device lock operation Read Native Max Address ‘F8’h Set Max Address ‘F9’h Able 36 Command table for device lock operationProtected Area Function Example for operation In LBA mode Shipping HDDs from HDD manufacturer Set Max security extension commands Set Max Set Password data content Reassign Function Seek OverlapWrite Cache Function Non recovered read errors 12.14 48-bit Address Feature SetNon recovered write errors Recovered read errors Software Setting Preservation Feature Set Preserved software settings Preserved Software Setting Native Command QueuingSmart Command Transport SCT SCT Action Code Supported Data Out Commands Command ProtocolData In Commands Non-Data Commands DMA Data Transfer Commands First-parity DMA Commands Command Descriptions Command set + Vendor specific command Command Set Subcommand Output Registers Input Registers Input Parameters From The Device Check Power Mode E5h/98hCheck Power Mode Command E5h/98h Device Configuration Freeze Lock subcommand C1h Device Configuration Overlay B1hDevice Configuration Restore subcommand C0h Device Configuration Overlay Command B1h Device Configuration Identify subcommand C2h Device Configuration SET subcommand C3h Device Configuration Overlay Data structure DCO error information definition Download Command 92h Download Microcode 92h 5K320 Sata OEM Specification Execute Device Diagnostic 90h Execute Device Diagnostic Command 90h Flush Cache Command E7h Flush Cache E7h Flush Cache EXT Command EAh Flush Cache Ext EAh Output Parameters To The Device LBA Low Format Track Command 50hFormat Track 50h Vendor Specific Format Unit Command F7h Format Unit F7h Vendor Specific Identify Device Command ECh Identify Device ECh Identify device information Identify device information 5K320 Sata OEM Specification Identify device information Identify device information Identify device information Identify device information 7AB8H =ATA8-AST 101 102 Output Parameters To The Device Idle Command E3h/97hIdle E3h/97h Idle Immediate E1h/95h Unload FeatureIdle Immediate Command E1h/95h Initialize Device Parameters Command 91h Initialize Device Parameters 91h Read Buffer Command E4h Read Buffer E4h Output Parameters To The Device Sector Count Read DMA Command C8h/C9hRead DMAC8h/C9h Read DMA Ext Command 25h Read DMA Ext 25h Feature Previous Read Fpdma Queued Command 60hOutput Parameters To The Device Feature Current Read Fpdma Queued 60h Read Log Ext2Fh Read Log Ext Command 2FhCommand Log address definition Extended comprehensive Smart error log General purpose Log Directory Extended Error log data structure Error Log versionError log index Extended comprehensive Smart error Log Command data structure Error data structure Self-test log data structure revision number Device error countExtended Self -test log sector Extended Self-test log data structure Self-test descriptor index Command ErrorCommand Error information Extended Self-test log descriptor entry Counter Identifiers Counter Reset MechanismsPhy Event Counter Read Log Ext Log Page 11h Phy Event Counter information Input Paramete rs From The Device Read Multiple Command C4hRead Multiple C4h Read Multiple Ext Command 29h Read Multiple Ext 29h Read Native Max Address Command F8h Read Native Max Address F8h Read Native Max Address Ext Command 29h Read Native Max Address Ext 27h Read Sectors Command 20h/21h Read Sectors 20h/21h Read Sectors Ext Command 24h Read Sectors Ext 24h Read Verify Sectors Command 40h/41h Read Verify Sectors 40h/41h Read Verify Sectors Ext Command 42h Read Verify Sectors Ext 42h Recalibrate Command 1xh Recalibrate 1xh Password Information for Security Disable Password command Security Disable Password F6hSecurity Disable Password Command F6h Security Erase Prepare Command F3h Security Erase Prepare F3h Erase Unit Information Security Erase Unit Command F4hSecurity Erase Unit F4h Identifier HTS543232L9SA00 / HTS5432 32L9A300 Security Freeze Lock Command F5h Security Freeze Lock F5h Security Set Password Information Security Set Password F1hSecurity Set Password Command F1h Revision Code PasswordSecurity Level Identifier=User / Security level = High Security Unlock Information Security Unlock Command F2hSecurity Unlock F2h Seek Command 7xh Seek 7xh Sense Condition Command F0h Sense Condition F0h vendor specific Set Features EFh Set Features Command EFh Description Set Max a ddress Command F9h Set Max Address F9h 04h SET MAX Freeze Lock Input Parameters From The Device LBA Low HOB=0 Set Max a ddress Ext Command 37hSet Max Address Ext 37h 142 Set Multiple Command C6h Set Multiple C6h Sleep Command E6h/99h Sleep E6h/99h 14.40 S.M.A.R.T Function Set B0h 14.40.1 S.M.A.R.T. Sub commandsM.A.R.T. Function Set Command B0h A.R.T. Save Attribute Values Subcommand D3h A.R.T. Read Attribute Thresholds Subcommand D1hA.R.T. Enable/Disable Attribute Autosave Subcommand D2h A.R.T. Execute Off-line Immediate Subcommand D4h LBA Mid ErrorStatus LBA High A.R.T. Enable Operations Subcommand D8h A.R.T. Read Log Sector Subcommand D5hA.R.T. Write Log Sector Subcommand D6h Log sector addresses A.R.T. Enable/Disable Automatic Off-Line Subcommand DBh A.R.T. Disable Operations Subcommand D9hA.R.T. Return Status Subcommand DAh Device Attribute Data Structure Device Attributes Data StructureData Structure Revision Number Status Flag Definitions Individual Attribute Data StructureIndividual Attribute Data Structure Bit Automatic Off-Line Data Collection Status Off-Line Data Collection StatusSelf-test execution status Value Definition Off-Line Data Collection Capability Error Logging CapabilityCurrent Segment Pointer 14.40.2.8 S.M.A.R.T. Capability Data Structure Checksum Device Attribute Thresholds Data StructureSelf-test completion time Individual Thresholds Data Structure Attribute ID Numbers 14.40.5 S.M.A.R.T. error log sector14.40.4 S.M.A.R.T. Log Directory Attribute Threshold Error log data structure 14.40.5.1 S.M.A.R.T. error log versionError log pointer X2h Value State X0hX1h X3h Self-test log data structure Selective self-test log data structure Error ReportingM.A.R.T. Error Codes Selective self-test log data structure Standby E2h/96h Standby Immediate E0h/94h Write Buffer E8h Write DMA CAh/CBh Write DMA Ext 35h Write DMA FUA Ext 3Dh Write Fpdma Queued 61h Write Log Ext 3Fh Sector Count Previous Write Multiple C5h Write Multiple Ext 39h Write Multiple FUA Ext CEh Write Sectors 30h/31h Write Sectors Ext 34h Write Uncorrectable Ext 45h Number of continuous sectors to be marked low order, bits Comreset Timings Erase Unit F4h on Copyright Hitachi Global Storage Technologies