Hitachi HTS543280L9A300, HTS543212L9SA00 specification

			5K320 SATA OEM Specification

Word	Content
0	0002h	Data Structure revision
1	Multiword DMA	modes supported
	15-3	Reserved
	2	1	= Multiword DMA mode 2 and below are supported
	1	1	= Multiword DMA mode 1 and below are supported
	0	1 = Multiword DMA mode 0 is supported
2	Ultra DMA modes	supported
	15-6	Reserved
	5	1	= Ultra DMA mode 5 and below are supported
	4	1	= Ultra DMA mode 4 and below are supported
	3	1	= Ultra DMA mode 3 and below are supported
	2	1	= Ultra DMA mode 2 and below are supported
	1	1	= Ultra DMA mode 1 and below are supported
	0	1	= Ultra DMA mode 0 is supported
3-6	Maximum LBA address
7	Command set/feature set supported
	15-9	Reserved
	8	1 = 48-bit Addressing feature set supported
	7	1	= Host Protected Area feature set supported
	6	1 = Automatic acoustic management supported
	5	Reserved
	4	1	= Power-Up in Standby feature set supported
	3	1	= Security feature set supported
	2	1	= SMART error log supported
	1	1 = SMART self-test supported
	0	1	= SMART feature set supported

8

9-254

255

SATA feature

15-5	Reserved
4	1 = Software setting preservation supported
3	Reserved
2	1	= Interface power management supported
1	1	= Non-zero buffer offset in DMA Setup FIS supported
0	1 = Native command queuing supported

Reserved

Integrity word <Note .>

15-8	Checksum
7-0	Signature (A5h)

Table 46 Device Configuration Overlay Data structure

Note.

Bits 7:0 of this word contain the value A5h. Bits 15:8 of this word contain the data structure checksum. The data structure checksum is the two’s complement of the sum of all byte in words 0 through 254 and the byte consisting of bits 7:0 of word 255. Each byte is added with unsigned arithmetic, and overflow is ignored. The sum of all bytes is zero when the checksum is correct.

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Image 82

Hitachi HTS543280L9A300, HTS543212L9SA00 manual Device Configuration Overlay Data structure

Contents

Hitachi Travelstar 5K320 Copyright Hitachi Global Storage Technologies Table of Contents 11.6 List of Figures List of Tables 5K320 Sata OEM Specification 5K320 Sata OEM Specification 5K320 Sata OEM Specification General Introduction Abbreviations EEC PIO References Drive handling precautionsGeneral caution Outline of the drive Part 1 Functional Specification Fixed disk subsystem description Head disk assembly dataControl Electronics Formatted capacity by model number Fixed disk characteristicsFormatted capacity by model number Cylinder allocation Data sheetData sheet Cylinder allocation Command overhead Performance characteristicsPerformance characteristics Full stroke seek Mechanical positioningAverage seek time including settling Average latency Drive ready time Drive ready time Adaptive power save control Mode transition timeOperating mode at power on Operating mode Data integrity Data loss on power offWrite safety Write Cache Data buffer test Error recoveryAutomatic reallocation ECC Environment SpecificationTemperature and humidity Corrosion test Conductive noise Radiation noiseMagnetic flux density limits DC power requirements Requirements Power consumption efficiency Power consumption efficiency Data reliability Service life and usage conditionReliability Failure prediction S.M.A.R.T Power switch design considerations Preventive maintenanceRequired Power-Off Sequence Load/unload Test considerations Physical dimensions and weight Mechanical specificationsPhysical dimensions and weight Mounting hole locations Mounting orientation Connector descriptionLoad/unload mechanism Random vibration Vibration and shockOperating vibration Swept sine vibration Operating shock Nonoperating vibrationNonoperating shock Acoustics Sound power levelWeighted sound power Discrete tone penalty Identification labels Electromagnetic compatibility Packaging SafetySubstance restriction requirements Interface connector Electrical interface specificationsCabling 1 TX+ / TX Signal definitionsInterface connector pins and I/O signals 2 RX+ / RX 5K320 Sata OEM Specification Out of band signaling M R E S E T / C O M in IT M W a K E 5K320 Sata OEM Specification Part 2 Interface Specification Terminology GeneralIntroduction Interrupt request Device or Host Physical Interface Deviations from StandardRegisters Device Control Register Command registerRegister naming convention Register naming convention and correspondence Error Register Error RegisterFeatures Register Device Register LBA Mid Register LBA High RegisterLBA Low Register Sector Count Register Corr COR General Operation Descriptions Reset ResponseReset Response Table Register Initialization Diagnostic Codes Diagnostic and Reset considerationsDefault Register Values Reset error register values Device’s behavior by ATA commands Power-off considerationsRequired power-off sequence Emergency unload Logical CHS Addressing Mode Sector Addressing ModePower Management Feature LBA Addressing Mode Standby/Sleep command completion timing Power ModePower Management Commands Interface Capability for Power Modes Active Idle mode Initial Power Mode at Power OnPerformance Idle mode Low Power Idle mode Transition Time Interface Power Management Mode Slumber and Partial12.8 S.M.A.R.T. Function Attributes Security Mode Feature Set Security Level PasswordMaster Password Revision Code Operation example Operation from POR after User Password is set Initial Setting User Password Lost Usual Operation Command Table Attempt limit for Security Unlock command Command table for device lock operation Protected Area Function Able 36 Command table for device lock operationRead Native Max Address ‘F8’h Set Max Address ‘F9’h Example for operation In LBA mode Shipping HDDs from HDD manufacturer Set Max security extension commands Set Max Set Password data content Write Cache Function Seek OverlapReassign Function Non recovered read errors 12.14 48-bit Address Feature SetNon recovered write errors Recovered read errors Software Setting Preservation Feature Set Preserved software settings Smart Command Transport SCT Native Command QueuingPreserved Software Setting SCT Action Code Supported Data In Commands Command ProtocolData Out Commands Non-Data Commands DMA Data Transfer Commands First-parity DMA Commands Command Descriptions Command set + Vendor specific command Command Set Subcommand Output Registers Input Registers Check Power Mode Command E5h/98h Check Power Mode E5h/98hInput Parameters From The Device Device Configuration Freeze Lock subcommand C1h Device Configuration Overlay B1hDevice Configuration Restore subcommand C0h Device Configuration Overlay Command B1h Device Configuration Identify subcommand C2h Device Configuration SET subcommand C3h Device Configuration Overlay Data structure DCO error information definition Download Command 92h Download Microcode 92h 5K320 Sata OEM Specification Execute Device Diagnostic 90h Execute Device Diagnostic Command 90h Flush Cache Command E7h Flush Cache E7h Flush Cache EXT Command EAh Flush Cache Ext EAh Format Track 50h Vendor Specific Format Track Command 50hOutput Parameters To The Device LBA Low Format Unit Command F7h Format Unit F7h Vendor Specific Identify Device Command ECh Identify Device ECh Identify device information Identify device information 5K320 Sata OEM Specification Identify device information Identify device information Identify device information Identify device information 7AB8H =ATA8-AST 101 102 Idle E3h/97h Idle Command E3h/97hOutput Parameters To The Device Idle Immediate Command E1h/95h Unload FeatureIdle Immediate E1h/95h Initialize Device Parameters Command 91h Initialize Device Parameters 91h Read Buffer Command E4h Read Buffer E4h Read DMAC8h/C9h Read DMA Command C8h/C9hOutput Parameters To The Device Sector Count Read DMA Ext Command 25h Read DMA Ext 25h Feature Previous Read Fpdma Queued Command 60hOutput Parameters To The Device Feature Current Read Fpdma Queued 60h Read Log Ext2Fh Read Log Ext Command 2FhCommand Log address definition Extended comprehensive Smart error log General purpose Log Directory Extended Error log data structure Error Log versionError log index Extended comprehensive Smart error Log Command data structure Error data structure Self-test log data structure revision number Device error countExtended Self -test log sector Extended Self-test log data structure Self-test descriptor index Command ErrorCommand Error information Extended Self-test log descriptor entry Counter Identifiers Counter Reset MechanismsPhy Event Counter Read Log Ext Log Page 11h Phy Event Counter information Read Multiple C4h Read Multiple Command C4hInput Paramete rs From The Device Read Multiple Ext Command 29h Read Multiple Ext 29h Read Native Max Address Command F8h Read Native Max Address F8h Read Native Max Address Ext Command 29h Read Native Max Address Ext 27h Read Sectors Command 20h/21h Read Sectors 20h/21h Read Sectors Ext Command 24h Read Sectors Ext 24h Read Verify Sectors Command 40h/41h Read Verify Sectors 40h/41h Read Verify Sectors Ext Command 42h Read Verify Sectors Ext 42h Recalibrate Command 1xh Recalibrate 1xh Security Disable Password Command F6h Security Disable Password F6hPassword Information for Security Disable Password command Security Erase Prepare Command F3h Security Erase Prepare F3h Erase Unit Information Security Erase Unit Command F4hSecurity Erase Unit F4h Identifier HTS543232L9SA00 / HTS5432 32L9A300 Security Freeze Lock Command F5h Security Freeze Lock F5h Security Set Password Command F1h Security Set Password F1hSecurity Set Password Information Revision Code PasswordSecurity Level Identifier=User / Security level = High Security Unlock F2h Security Unlock Command F2hSecurity Unlock Information Seek Command 7xh Seek 7xh Sense Condition Command F0h Sense Condition F0h vendor specific Set Features EFh Set Features Command EFh Description Set Max a ddress Command F9h Set Max Address F9h 04h SET MAX Freeze Lock Set Max Address Ext 37h Set Max a ddress Ext Command 37hInput Parameters From The Device LBA Low HOB=0 142 Set Multiple Command C6h Set Multiple C6h Sleep Command E6h/99h Sleep E6h/99h M.A.R.T. Function Set Command B0h 14.40.1 S.M.A.R.T. Sub commands14.40 S.M.A.R.T Function Set B0h A.R.T. Save Attribute Values Subcommand D3h A.R.T. Read Attribute Thresholds Subcommand D1hA.R.T. Enable/Disable Attribute Autosave Subcommand D2h A.R.T. Execute Off-line Immediate Subcommand D4h LBA Mid ErrorStatus LBA High A.R.T. Enable Operations Subcommand D8h A.R.T. Read Log Sector Subcommand D5hA.R.T. Write Log Sector Subcommand D6h Log sector addresses A.R.T. Return Status Subcommand DAh A.R.T. Disable Operations Subcommand D9hA.R.T. Enable/Disable Automatic Off-Line Subcommand DBh Data Structure Revision Number Device Attributes Data StructureDevice Attribute Data Structure Individual Attribute Data Structure Individual Attribute Data StructureStatus Flag Definitions Bit Automatic Off-Line Data Collection Status Off-Line Data Collection StatusSelf-test execution status Value Definition Off-Line Data Collection Capability Error Logging CapabilityCurrent Segment Pointer 14.40.2.8 S.M.A.R.T. Capability Data Structure Checksum Device Attribute Thresholds Data StructureSelf-test completion time Individual Thresholds Data Structure Attribute ID Numbers 14.40.5 S.M.A.R.T. error log sector14.40.4 S.M.A.R.T. Log Directory Attribute Threshold Error log pointer 14.40.5.1 S.M.A.R.T. error log versionError log data structure X2h Value State X0hX1h X3h Self-test log data structure Selective self-test log data structure Error ReportingM.A.R.T. Error Codes Selective self-test log data structure Standby E2h/96h Standby Immediate E0h/94h Write Buffer E8h Write DMA CAh/CBh Write DMA Ext 35h Write DMA FUA Ext 3Dh Write Fpdma Queued 61h Write Log Ext 3Fh Sector Count Previous Write Multiple C5h Write Multiple Ext 39h Write Multiple FUA Ext CEh Write Sectors 30h/31h Write Sectors Ext 34h Write Uncorrectable Ext 45h Number of continuous sectors to be marked low order, bits Comreset Timings Erase Unit F4h on Copyright Hitachi Global Storage Technologies