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Hitachi HTS543212L9SA00 Register naming convention, Command register, Device Control Register

Models: HTS543212L9SA00 HTS543280L9A300

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5K320 SATA OEM Specification

11.1 Register naming convention

This specification uses the same naming conventions for the Command Block Registers as the ATA8-ACS standard. However, the register naming convention is different from that uses in the Serial ATA 2.6 specification. The following table defines the corresponding of the register names used in this specification with those used in the Serial ATA 2.6 specification.

Serial ATA register name

Features

Features (exp)

Sector count

Sector count (exp)

LBA low

LBA low (exp)

LBA mid

LBA mid (exp)

LBA high

LBA high (exp)

Device

Command

Control

Status

Error

Register name in this specification when writing registers

Feature current

Feature previous

Sector count current

Sector count previous

LBA low current

LBA low previous

LBA mid current

LBA mid previous

LBA high current

LBA high previous

Device

Command

Device Control

N/A

N/A

Register name in this specification when reading registers

Sector count HOB=0

Sector count HOB=1

LBA low HOB=0

LBA low HOB=1

LBA mid HOB=0

LBA mid HOB=1

LBA mid HOB=0

LBA mid HOB=1

Device

N/A

N/A

Status

Error

Table 24 Register naming convention and correspondence

11.2 Command register

This register contains the command code being sent to the device. Command execution begins immediately after this register is written. The command set is shown in “Table 40 Command set” on page 75.

All other registers required for the command must be set up before writing the Command Register.

11.3 Device Control Register

Device Control Register

7

-

6

-

5

-

4

-

3

1

2

SRST

1	0
-IEN	0

Table 25 Device Control Register

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Hitachi HTS543212L9SA00, HTS543280L9A300 manual Register naming convention, Command register, Device Control Register

Contents

Hitachi Travelstar 5K320 Copyright Hitachi Global Storage Technologies Table of Contents 11.6 List of Tables List of Figures5K320 Sata OEM Specification 5K320 Sata OEM Specification 5K320 Sata OEM Specification Abbreviations General IntroductionEEC PIO General caution Drive handling precautionsReferences Outline of the drive Part 1 Functional Specification Control Electronics Head disk assembly dataFixed disk subsystem description Formatted capacity by model number Fixed disk characteristicsFormatted capacity by model number Cylinder allocation Data sheetData sheet Cylinder allocationPerformance characteristics Performance characteristicsCommand overhead Average latency Mechanical positioningAverage seek time including settling Full stroke seekDrive ready time Drive ready timeOperating mode Mode transition timeOperating mode at power on Adaptive power save controlWrite Cache Data loss on power offWrite safety Data integrityAutomatic reallocation Error recoveryData buffer test ECC Corrosion test SpecificationTemperature and humidity EnvironmentMagnetic flux density limits Radiation noiseConductive noise Requirements DC power requirementsPower consumption efficiency Power consumption efficiencyFailure prediction S.M.A.R.T Service life and usage conditionReliability Data reliabilityLoad/unload Preventive maintenanceRequired Power-Off Sequence Power switch design considerationsTest considerations Mounting hole locations Mechanical specificationsPhysical dimensions and weight Physical dimensions and weightLoad/unload mechanism Connector descriptionMounting orientation Swept sine vibration Vibration and shockOperating vibration Random vibrationNonoperating shock Nonoperating vibrationOperating shock Discrete tone penalty Sound power levelWeighted sound power AcousticsElectromagnetic compatibility Identification labelsSubstance restriction requirements SafetyPackaging Cabling Electrical interface specificationsInterface connector 2 RX+ / RX Signal definitionsInterface connector pins and I/O signals 1 TX+ / TX5K320 Sata OEM Specification M R E S E T / C O M in IT M W a K E Out of band signaling5K320 Sata OEM Specification Part 2 Interface Specification Interrupt request Device or Host GeneralIntroduction TerminologyRegisters Deviations from StandardPhysical Interface Register naming convention and correspondence Command registerRegister naming convention Device Control RegisterDevice Register Error RegisterFeatures Register Error RegisterSector Count Register LBA High RegisterLBA Low Register LBA Mid RegisterCorr COR Register Initialization Reset ResponseReset Response Table General Operation DescriptionsReset error register values Diagnostic and Reset considerationsDefault Register Values Diagnostic CodesEmergency unload Power-off considerationsRequired power-off sequence Device’s behavior by ATA commandsLBA Addressing Mode Sector Addressing ModePower Management Feature Logical CHS Addressing ModeInterface Capability for Power Modes Power ModePower Management Commands Standby/Sleep command completion timingLow Power Idle mode Initial Power Mode at Power OnPerformance Idle mode Active Idle modeAttributes Interface Power Management Mode Slumber and Partial12.8 S.M.A.R.T. Function Transition TimeSecurity Mode Feature Set Operation example PasswordMaster Password Revision Code Security LevelInitial Setting Operation from POR after User Password is setUsual Operation User Password LostAttempt limit for Security Unlock command Command TableCommand table for device lock operation Read Native Max Address ‘F8’h Set Max Address ‘F9’h Able 36 Command table for device lock operationProtected Area Function Shipping HDDs from HDD manufacturer Example for operation In LBA modeSet Max Set Password data content Set Max security extension commandsReassign Function Seek OverlapWrite Cache Function Recovered read errors 12.14 48-bit Address Feature SetNon recovered write errors Non recovered read errorsPreserved software settings Software Setting Preservation Feature SetPreserved Software Setting Native Command QueuingSmart Command Transport SCT SCT Action Code Supported Data Out Commands Command ProtocolData In Commands Non-Data Commands First-parity DMA Commands DMA Data Transfer CommandsCommand set Command Descriptions+ Vendor specific command Output Registers Command Set SubcommandInput Registers Input Parameters From The Device Check Power Mode E5h/98hCheck Power Mode Command E5h/98h Device Configuration Overlay Command B1h Device Configuration Overlay B1hDevice Configuration Restore subcommand C0h Device Configuration Freeze Lock subcommand C1hDevice Configuration SET subcommand C3h Device Configuration Identify subcommand C2hDevice Configuration Overlay Data structure DCO error information definition Download Microcode 92h Download Command 92h5K320 Sata OEM Specification Execute Device Diagnostic Command 90h Execute Device Diagnostic 90hFlush Cache E7h Flush Cache Command E7hFlush Cache Ext EAh Flush Cache EXT Command EAhOutput Parameters To The Device LBA Low Format Track Command 50hFormat Track 50h Vendor Specific Format Unit F7h Vendor Specific Format Unit Command F7hIdentify Device ECh Identify Device Command EChIdentify device information Identify device information 5K320 Sata OEM Specification Identify device information Identify device information Identify device information Identify device information 7AB8H =ATA8-AST 101 102 Output Parameters To The Device Idle Command E3h/97hIdle E3h/97h Idle Immediate E1h/95h Unload FeatureIdle Immediate Command E1h/95h Initialize Device Parameters 91h Initialize Device Parameters Command 91hRead Buffer E4h Read Buffer Command E4hOutput Parameters To The Device Sector Count Read DMA Command C8h/C9hRead DMAC8h/C9h Read DMA Ext 25h Read DMA Ext Command 25hRead Fpdma Queued 60h Read Fpdma Queued Command 60hOutput Parameters To The Device Feature Current Feature PreviousLog address definition Read Log Ext Command 2FhCommand Read Log Ext2FhGeneral purpose Log Directory Extended comprehensive Smart error logExtended comprehensive Smart error Log Error Log versionError log index Extended Error log data structureError data structure Command data structureExtended Self-test log data structure Device error countExtended Self -test log sector Self-test log data structure revision numberExtended Self-test log descriptor entry Command ErrorCommand Error information Self-test descriptor indexRead Log Ext Log Page 11h Counter Reset MechanismsPhy Event Counter Counter IdentifiersPhy Event Counter information Input Paramete rs From The Device Read Multiple Command C4hRead Multiple C4h Read Multiple Ext 29h Read Multiple Ext Command 29hRead Native Max Address F8h Read Native Max Address Command F8hRead Native Max Address Ext 27h Read Native Max Address Ext Command 29hRead Sectors 20h/21h Read Sectors Command 20h/21hRead Sectors Ext 24h Read Sectors Ext Command 24hRead Verify Sectors 40h/41h Read Verify Sectors Command 40h/41hRead Verify Sectors Ext 42h Read Verify Sectors Ext Command 42hRecalibrate 1xh Recalibrate Command 1xhPassword Information for Security Disable Password command Security Disable Password F6hSecurity Disable Password Command F6h Security Erase Prepare F3h Security Erase Prepare Command F3hIdentifier Security Erase Unit Command F4hSecurity Erase Unit F4h Erase Unit InformationHTS543232L9SA00 / HTS5432 32L9A300 Security Freeze Lock F5h Security Freeze Lock Command F5hSecurity Set Password Information Security Set Password F1hSecurity Set Password Command F1h Identifier=User / Security level = High PasswordSecurity Level Revision CodeSecurity Unlock Information Security Unlock Command F2hSecurity Unlock F2h Seek 7xh Seek Command 7xhSense Condition F0h vendor specific Sense Condition Command F0hSet Features Command EFh Set Features EFhDescription Set Max Address F9h Set Max a ddress Command F9hSET MAX Freeze Lock 04hInput Parameters From The Device LBA Low HOB=0 Set Max a ddress Ext Command 37hSet Max Address Ext 37h 142 Set Multiple C6h Set Multiple Command C6hSleep E6h/99h Sleep Command E6h/99h14.40 S.M.A.R.T Function Set B0h 14.40.1 S.M.A.R.T. Sub commandsM.A.R.T. Function Set Command B0h A.R.T. Execute Off-line Immediate Subcommand D4h A.R.T. Read Attribute Thresholds Subcommand D1hA.R.T. Enable/Disable Attribute Autosave Subcommand D2h A.R.T. Save Attribute Values Subcommand D3hLBA High ErrorStatus LBA MidLog sector addresses A.R.T. Read Log Sector Subcommand D5hA.R.T. Write Log Sector Subcommand D6h A.R.T. Enable Operations Subcommand D8hA.R.T. Enable/Disable Automatic Off-Line Subcommand DBh A.R.T. Disable Operations Subcommand D9hA.R.T. Return Status Subcommand DAh Device Attribute Data Structure Device Attributes Data StructureData Structure Revision Number Status Flag Definitions Individual Attribute Data StructureIndividual Attribute Data Structure Value Definition Off-Line Data Collection StatusSelf-test execution status Bit Automatic Off-Line Data Collection Status14.40.2.8 S.M.A.R.T. Capability Error Logging CapabilityCurrent Segment Pointer Off-Line Data Collection CapabilityIndividual Thresholds Data Structure Device Attribute Thresholds Data StructureSelf-test completion time Data Structure ChecksumAttribute Threshold 14.40.5 S.M.A.R.T. error log sector14.40.4 S.M.A.R.T. Log Directory Attribute ID NumbersError log data structure 14.40.5.1 S.M.A.R.T. error log versionError log pointer X3h Value State X0hX1h X2hSelf-test log data structure Selective self-test log data structure Error ReportingM.A.R.T. Error Codes Selective self-test log data structureStandby E2h/96h Standby Immediate E0h/94h Write Buffer E8h Write DMA CAh/CBh Write DMA Ext 35h Write DMA FUA Ext 3Dh Write Fpdma Queued 61h Sector Count Previous Write Log Ext 3FhWrite Multiple C5h Write Multiple Ext 39h Write Multiple FUA Ext CEh Write Sectors 30h/31h Write Sectors Ext 34h Write Uncorrectable Ext 45h Number of continuous sectors to be marked low order, bits Timings ComresetErase Unit F4h on Copyright Hitachi Global Storage Technologies