HP E1433A User's Guide
Register Definitions
DSP Bus Registers
There are two
200A
200B16
DSP Command Register
Boot Register
Note that these registers appear multiple times in the memory map, since only the address lines
The A24 registers are defined as follows:
Boot Register: This read/write register is used to configure the device after a device reset. It has the following format:
Bit |
| 15 | 14 | 13 | 12 | |
Contents | Unused | Spare | ST Done | Loaded | Ready | Model |
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| Code | ||
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Spare: This read/write bit has no
ST Done: This bit should be written to a one (1) when the DSP successfully competes its
Loaded: This bit should be written to a one (1) when (or immediately after) the DSP loads the model code, before competing its
Ready: This bit is written to a one (1) to indicate that the device is ready for normal operation. Its initial value is zero (0).
Model Code: As soon as possible, and within 25 ms after coming out of reset, when the DSP has valid code loaded, it should write the VXI model code to these bits. Their initial value is 0x0200.