HP E1433A User's Guide
Register Definitions
DSP Command Register: This register is used to assert VXI interrupts and toggle various status register bits. Many of the bits in this register are grouped into related Clock and Value pairs. This allow the bits to be modified independently with single register writes. In order to change an output value, the Clock bit must be written as a one (1), while the Value is written as the desired output value. Writing the Clock bit as a zero (0) will not change the output state. The current state is read from the Value bit.
The DSP Command register has the following format:
Bit |
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| 23 |
| 22 |
| 21 |
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| 20 |
| 19 |
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| 18 |
| 17 |
| 16 | |||||
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| FIFO |
| FIFO |
| FIFO |
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| FIFO |
| DONE |
| DONE | ERRn | ERRn | ||||||
Contents |
| Unused |
| Enable |
| Enable |
| In |
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| In |
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| Clock |
| Value | Clock | Value | |||||||||||||
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| Clock |
| Value |
| Clock |
| Value |
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Bit |
| 15 |
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| 14 |
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| 13 |
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| 12 |
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| 11 |
| 10 |
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| Q Resp |
| Q Resp |
| Cmd |
|
| Cmd |
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| IRQ |
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| IRQ |
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| |||||
Contents |
| Ready |
| Ready |
| Ready |
| Ready |
| Enable |
| Enable |
| Unused |
| |||||||||
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| Clock |
| Value |
| Clock |
| Value |
|
| Clock |
| Value |
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