HP E1432A User's Guide
Register Definitions
Wait for Done
This is the procedure to wait for command completion and check for error.
1Wait for Command/Parameter Ready true.
2Wait for Done true.
3If Err* = 0 , handle error.
Complex Sequences
A robust procedure for sending a query and reading the response would look like this:
1Send Command.
2Wait for Done.
3If no error then Read Response.
Multiple commands may be sent with a test for errors at the end of the sequence. This example sends three commands before checking for errors.
1Send Command.
2Send Command.
3Send Command.
4Wait for Done.
DSP Protocol
When a controller writes to the Command register, a DSP interrupt is generated. When responding to this interrupt, the DSP will follow this procedure.
1Clear the Done bit.
2Read and decode the command from the Command register.
3Read any parameters from the Parameter registers and RAM.
4If a response data is required:
5a. Write the data to the Query Response register, Parameter registers, and RAM.
6b. Set Query Response Ready true.
7Set Command/Parameter Ready true.
8Finish command execution.
9If any errors are pending set Err* = 0, else set Err* = 1.
10Set Done true.
There are two additional requirement for the DSP:
1Once it begins processing a command interrupt, the DSP must defer processing subsequent commands until it has finished.
2The DSP software maintains an error(s) pending flag (and possibly and error queue) that is set by any command decoding or execution error, and cleared by some other method such as an error query.
