8086
Table 2. Instruction Set Summary (Continued)
Mnemonic and
Description
Instruction Code
LOGIC | 7 6 5 4 3 2 1 0 | 7 6 5 4 3 2 1 0 | 7 6 5 4 3 2 1 0 | 7 6 5 4 3 2 1 0 |
NOT e Invert |
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1 1 1 1 0 1 1 w | mod 0 1 0 r/m |
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SHL/SAL e Shift Logical/Arithmetic Left | 1 1 0 1 0 0 v w | mod 1 0 0 r/m |
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SHR e Shift Logical Right | 1 1 0 1 0 0 v w | mod 1 0 1 r/m |
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SAR e Shift Arithmetic Right | 1 1 0 1 0 0 v w | mod 1 1 1 r/m |
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ROL e Rotate Left | 1 1 0 1 0 0 v w | mod 0 0 0 r/m |
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ROR e Rotate Right | 1 1 0 1 0 0 v w | mod 0 0 1 r/m |
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RCL e Rotate Through Carry Flag Left | 1 1 0 1 0 0 v w | mod 0 1 0 r/m |
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RCR e Rotate Through Carry Right | 1 1 0 1 0 0 v w | mod 0 1 1 r/m |
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AND e And: |
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Reg./Memory and Register to Either | 0 0 1 0 0 0 d w | mod reg r/m |
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Immediate to Register/Memory | 1 0 0 0 0 0 0 w | mod 1 0 0 r/m | data | data if w e 1 |
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Immediate to Accumulator | 0 0 1 0 0 1 0 w | data | data if w e 1 |
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TEST e And Function to Flags, No Result: |
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Register/Memory and Register | 1 0 0 0 0 1 0 w | mod reg r/m |
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Immediate Data and Register/Memory | 1 1 1 1 0 1 1 w | mod 0 0 0 r/m | data | data if w e 1 |
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Immediate Data and Accumulator | 1 0 1 0 1 0 0 w | data | data if w e 1 |
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OR e Or: |
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Reg./Memory and Register to Either | 0 0 0 0 1 0 d w | mod reg r/m |
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Immediate to Register/Memory | 1 0 0 0 0 0 0 w | mod 0 0 1 r/m | data | data if w e 1 |
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Immediate to Accumulator | 0 0 0 0 1 1 0 w | data | data if w e 1 |
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XOR e Exclusive or: |
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Reg./Memory and Register to Either | 0 0 1 1 0 0 d w | mod reg r/m |
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Immediate to Register/Memory | 1 0 0 0 0 0 0 w | mod 1 1 0 r/m | data | data if w e 1 |
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Immediate to Accumulator | 0 0 1 1 0 1 0 w | data | data if w e 1 |
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STRING MANIPULATION |
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REP e Repeat |
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1 1 1 1 0 0 1 z |
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MOVS e Move Byte/Word |
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1 0 1 0 0 1 0 w |
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CMPS e Compare Byte/Word |
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1 0 1 0 0 1 1 w |
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SCAS e Scan Byte/Word |
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1 0 1 0 1 1 1 w |
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LODS e Load Byte/Wd to AL/AX |
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1 0 1 0 1 1 0 w |
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STOS e Stor Byte/Wd from AL/A |
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1 0 1 0 1 0 1 w |
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CONTROL TRANSFER |
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CALL e Call: |
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Direct within Segment | 1 1 1 0 1 0 0 0 |
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Indirect within Segment | 1 1 1 1 1 1 1 1 | mod 0 1 0 r/m |
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Direct Intersegment | 1 0 0 1 1 0 1 0 |
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Indirect Intersegment
1 1 1 1 1 1 1 1 | mod 0 1 1 r/m |
Mnemonics ' Intel, 1978
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