Minimum Mode 8086 Typical Configuration | Intel 8086-2, 8086-1

8086

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Figure 4a. Minimum Mode 8086 Typical Configuration

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Figure 4b. Maximum Mode 8086 Typical Configuration

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Intel 8086-2, 8086-1 manual Minimum Mode 8086 Typical Configuration

Contents

Pin Configuration CPU Block Diagram LOW BHE/S BHE Reset ReadyIntr Test LOW HighRQ/GT0 RQ/GT1 Inta ALEDT/R DEN Functional Description Minimum and Maximum Modes BUS Operation Minimum Mode 8086 Typical Configuration Read I/O Write I/OInstruction Fetch Read Data from Memory Processor Reset and Initialization Alternate Data extra segmentAddressing Interrupt Operations READ/MODIFY/WRITE Semaphore Operations VIA Lock Maskable Interrupt IntrHalt External Synchronization VIA Test System TIMING-MINIMUM System BUS TIMING-MEDIUM Size Systems Absolute Maximum Ratings Minimum Complexity System Timing Requirements TclclTclch Tchcl Characteristics Timing Responses Waveforms Testing INPUT, Output Waveform Testing Load CircuitMinimum Mode Waveforms Minimum Mode Characteristics TinvchNMI, Test Tgvch Tchgx Tclml TclmhTryhsh Tchsv Trhav TCLCL-45 TCLCL-35 TCLCL-40Tchdtl Tchdth Maximum Mode Waveforms Maximum Mode Asynchronous Signal Recognition BUS Lock Signal Timing Maximum Mode Only Reset TimingREQUEST/GRANT Sequence Timing Maximum Mode only Waveforms HOLD/HOLD Acknowledge Timing Minimum Mode only Instruction Set Summary Data Transfer Arithmetic Logic 8086 Bit w e Segment 000 001 010 011 100 101 110 111 Data Sheet Revision Review1 reg 1 1