OCPRF100 MP Server System Technical Product Specification

Revision 1.0

8.6.1.3.3Drive Present Status Region (0xFA00 – 0xFAFF)

The absence or presence of each drive is detected by the state of pin 44 on that drive’s SCA con- nector. A drive that is present will have its corresponding bit set to one in this register. Bits 7:6 in this register indicate the revision of the PLD code that is installed.

Table 8-3: Drive Present Status Byte Format

Bit(s)

Name

Reset Action

R/W

Description

 

 

 

 

 

1:0

DRVPRES[1:0]

N/A

RO

Drive present sense. 0=drive absent, 1=drive present. Bit 0

 

 

 

 

corresponds to drive ID 0.

 

 

 

 

 

SCSI Target Access Region (0xFB00 – 0xFBFF)

The Symbios 53C80 SCSI target appears to the controller as a set of eight registers at sequential addresses. For details, refer to the Symbios SYM53C80E/S Data Manual.

8.6.1.3.4SCSI DACK Access Region (0xFC00 – 0xFCFF)

When the SCSI target is in DMA mode, data bytes may be read from or written to the 53C80S by reading or writing the DACK access region. This asserts the DACK_L input of the 53C80S instead of the CS_L input.

8.6.2I/O Ports

80C652 architecture provides four memory-mapped I/O ports:

Port #0 (P0).

Port #1 (P1).

Port #2 (P2).

Port #3 (P3).

8.6.2.1P0

Since the firmware for the microcontroller is located in a Flash memory device (for ease of debugging and for possible field upgradeability), and all memory and memory-mapped I/O is located outside the microcontroller, P0 is used as a time-multiplexed low-order address and data bus. It is not used for general I/O purposes.

8.6.2.2P1

P1 has two dedicated-function signals, and six implementation-specific control signals, as shown in Table 8-4: P1 Functions.

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