Intel OCPRF100 MP 10.2.2.1Device Maps, Table 10-1:Device Maps, 10.2.2.2I/O Memory Maps, Table 10-2:I/O Signals and Devices

OCPRF100 MP Server System Technical Product Specification

Revision 1.0

10.2.2.1Device MapsTable 10-1: Device Maps

Function	Address Range	Access	Width
Output Latch #1	FFF0 - FFFF	Write	Byte
		(Read RAM Shadow)
Output Latch #0	FFE0 - FFEF	Write	Byte
		(Read RAM Shadow)
RAM, Output Latch Shadow	FF00 - FFFF	Execute, Read, Write	Byte
		(Shadows Output Latches)
Input Latch #1	FFD0 - FFDF	Read	Byte
Input Latch #0	FFC0 - FFCF	Read	Byte
PLD	FE00 - FFFF	Read, Write	Byte
RAM # 0	E000 - FDFF	Execute, Read, Write	Byte
FLASH, OPS	1000 - DFFF	Execute, Read, Write	Byte
FLASH, BOOT	0000 - 0FFF	Execute, Read	Byte

10.2.2.2I/O Memory Maps

Table 10-2: I/O Signals and Devices provides a cross reference between the I/O signals and the individual devices. These can be referenced against the device map section to resolve the absolute address.

Table 10-2: I/O Signals and Devices

Topic	Signal	Device	Addres	Acces	Offset	Bit
			s	s
Not Applicable	Not Applicable	Micro Port 0	-	-	-	0 to 7
	(Muxed Address/Data BUS)
LCD	LCD_RW	Micro Port 1	-	RW	-	0
LCD	LCD_EN	Micro Port 1	-	RW	-	1
LCD	LCD_RS	Micro Port 1	-	RW	-	2
Miscellaneous	RESET_OUTPUTS_L	Micro Port 1	-	RW	-	3

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