OCPRF100 MP Server System Technical Product Specification

Revision 1.0

Table 6-10: I/O Device Configuration Submenu

Mode

Output only

Selects the mode of the LPT port.

 

Bidirectional†

 

 

EPP

 

 

ECP

 

 

 

 

Base I/O Address

378h†

Selects the base I/O address for LPT port. 178h is only available

 

278h

when the LPT port is in EPP mode. Otherwise, 3BCh is available.

 

178h

 

 

3BCh

 

 

 

 

Interrupt

IRQ 5

Selects the IRQ for LPT port.

 

IRQ 7†

 

 

 

 

DMA channel

DMA 1

Selects the DMA channel for LPT port when configured for ECP

 

DMA 3†

mode.

 

 

 

Floppy disk controller

Disabled

Enables embedded floppy disk controller.

 

Enabled†

 

 

Auto

 

 

 

 

NOTES: Default values are marked with the "† " symbol.

Table 6-11: Advanced Chip Set Control Submenu

Feature

 

Option

Description

 

 

 

Extended RAM Step

1 MB†

Selects the thoroughness of the extended memory. If “1 MB” is

 

 

1KB

selected, BIOS tests each 1 MB boundary. If “1KB” is selected, BIOS

 

 

Every location

tests each 1KB boundary. If “Every location” is selected, BIOS tests

 

 

 

every byte. BIOS defaults to the fastest test.

 

 

 

 

L2 Cache

 

Disabled

Enables the second level cache. The second level cache should be

 

 

Enabled†

disabled only for diagnostic purposes.

 

 

 

 

 

 

 

 

 

Multiboot Support

Disabled†

Enables Boot Device Selection.

 

 

Enabled

 

 

 

 

Override PHP Switches

Disabled†

If enabled, all PCI slots power-up. If disabled, only PCI slots with

 

 

Enabled

plug-in cards power-up.

 

 

 

 

NOTES:

Default values are marked with the "† " symbol.

 

 

 

 

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