OCPRF100 MP Server System Technical Product Specification

Revision 1.0

 

 

Table 6-9: PCI Mode Submenu

 

 

 

Feature

Option

Description

 

 

 

Option ROM Scan

Disabled

Enables option ROM scan.

 

Enabled†

 

 

 

 

Enable Master

Disabled

Enables device(s) as a PCI bus master.

 

Enabled†

 

 

 

 

Latency Timer

Default

Specifies the minimum guaranteed number of PCI bus clocks that a device

 

0020h

can master on a PCI bus during one transaction.

 

0040h

 

 

0060h

 

 

0080h†

 

 

00A0h

 

 

00C0h

 

 

00E0h

 

 

 

 

NOTES: Default values are marked with the "† " symbol.

Table 6-10: I/O Device Configuration Submenu

Feature

Option

Description

 

 

 

Serial Port A

Disabled

If set to “Auto,” BIOS configures the port.

 

Enabled†

 

 

Auto

 

 

 

 

Base I/O Address

3F8h†

Selects the base I/O address for COM port A.

 

2F8h

 

 

3E8h

 

 

2E8h

 

 

 

 

Interrupt

IRQ 3

Selects the IRQ for COM port A.

 

IRQ 4†

 

 

 

 

Serial Port B

Disabled

If set to “Auto,” BIOS configures the port.

 

Enabled†

 

 

Auto

 

 

 

 

Base I/O Address

3F8h

Selects the base I/O address for COM port B.

 

2F8h†

 

 

3E8h

 

 

2E8h

 

 

 

 

Interrupt

IRQ 3†

Selects the IRQ for COM port B.

 

IRQ 4

 

 

 

 

Parallel Port

Disabled

If set to “Auto,” BIOS configures the port.

 

Enabled†

 

 

Auto

 

 

 

 

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