Intel OCPRF100 MP Table 6-4.IDE Submenu, Table 6-5:Processor Information Submenu

OCPRF100 MP Server System Technical Product Specification

Revision 1.0

		Table 6-4. IDE Submenu
LBA Mode Control	Disabled		Displays status of Logical Block Access. Autotyped by BIOS.
	Enabled
32 Bit I/O	Disabled†		Enables 32-bit IDE data transfers.
	Enabled
Transfer Mode	Standard		Selects the method for transferring data to/from the drive. Auto-
	Fast PIO 1		typed by BIOS.
	Fast PIO 2
	Fast PIO 3
	Fast PIO 4
Ultra-DMA Mode	Disabled		Selects the Ultra-DMA mode used for transferring data to/from the
	Mode 0		drive. Autotyped by BIOS.
	Mode 1
	Mode 2

NOTES: Default values are marked with the "† " symbol.

Table 6-5: Processor Information Submenu

Feature	Option	Description
Left Processor 1 Stepping ID		Displays the stepping of the processor.
Left Processor 1 L2 Cache Size		Displays the size of the L2 cache.
Left Processor 2 Stepping ID		Displays the stepping of the processor.
Left Processor 2 L2 Cache Size		Displays the size of the L2 cache.
Left Processor 3 Stepping ID		Displays the stepping of the processor.
Left Processor 3 L2 Cache Size		Displays the size of the L2 cache.
Left Processor 4 Stepping ID		Displays the stepping of the processor.
Left Processor 4 L2 Cache Size		Displays the size of the L2 cache.
Right Processor 1 Stepping ID		Displays the stepping of the processor.
Right Processor 1 L2 Cache Size		Displays the size of the L2 cache.
Right Processor 2 Stepping ID		Displays the stepping of the processor.
Right Processor 2 L2 Cache Size		Displays the size of the L2 cache.
Right Processor 3 Stepping ID		Displays the stepping of the processor.
Right Processor 3 L2 Cache Size		Displays the size of the L2 cache.
Right Processor 4 Stepping ID		Displays the stepping of the processor.
Right Processor 4 L2 Cache Size		Displays the size of the L2 cache.

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