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OCPRF100 MP Server System Technical Product Specification
Revision 1.0
each region is a single address. Thus, aliases will occur on byte boundaries throughout the remainder of the region decoded for that function. Note that the eighth region from 0xFF00 – 0xFFFF is not used.
In register bit descriptions listed below, five fields are shown: the data bit number(s), the name of the field, how the bit(s) respond to a reset, whether the bits are readable and/or writeable, and a description of the field. RO indicates
The drive fault LEDs are controlled by this register. Writing a one to a bit turns the corresponding LED on. Reading the register returns the current state of the LEDs. A warm or cold reset clears all register bits to zero. The upper two bits are undefined.
Table
Bit(s) | Name | Reset Action | R/W | Description |
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7:2 | Reserved | N/A |
| Reserved bits. |
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1:0 | FLT[1:0] | Clear | RW | Drive fault LED enable. 0=LED off, 1=LED on. Bit 0 corre- |
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| sponds to drive ID 0. |
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Power is applied to a drive when its corresponding
Table
Bit(s) | Name | Reset Action | R/W | Description |
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7:2 | Reserved | N/A |
| Reserved bits. |
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1:0 | DRVPWR[1:0] | (see text) | RW | Drive power enable. 0=power off, 1=power on. Bit 0 corre- |
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| sponds to drive ID 0. |
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100