OCPRF100 MP Server System Technical Product Specification
Revision 1.0
Ultra I/O chip also provides a keyboard controller containing Phoenix* microcode. BIOS downloads commands to the keyboard controller to provide various security features.
The I/O carrier contains 10
BIOS uses the programmable interrupt device (PID) to route PCI interrupts to the
The system flash ROM contains 2 MB of field programmable memory. The upper 1 MB contains BIOS and other regions reserved for Intel. The lower 1 MB is available for use by system ven- dors. BIOS implements a security mechanism that reduces the risk of unauthorized modification of the system flash ROM.
6.1.4Intelligent Platform Management Bus
BIOS communicates with the IPMB to update the SEL through the baseboard management controller (BMC), display messages on the LCD, and implement FRB. By passing messages over the IPMB to the BMC, server management cards can access the log, even if the system processors are not running.
The server management interface controller (SMIC) provides the gateway to the IPMB. The BMC accesses many of the system components.
The BIOS provides interface functions that allow
6.2Industry Standards
The OCPRF100 MP server system BIOS supports industry standards wherever possible. These standards expand the range of operating systems, software, adapters, and peripheral devices supported by the system.
System vendors that develop software to differentiate their server products also benefit because standards provide a consistent programming interface, regardless of the underlying hardware.
The system BIOS is governed by the following industry standards.
6.2.1ACPI
The system BIOS supports the Advanced Configuration and Power Interface (ACPI) Specification , Revision 1.0. ACPI is the key element in operating system directed power management. It supports an orderly transition from existing (legacy) hardware to
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