Developer’s Manual March, 2003 C-11
Intel® 80200 Processor based on Intel® XScale™ Microarchitecture
Test Features
C.2.5.13. Exit1-IR State
This is a temporary state. If TMS is held high on the rising edge of TCK, the controller enters the
Update-IR state, which terminates the scanning process. If TMS is held low on the rising edge of
TCK, the controller enters the Pause-IR state.
The test data register selected by the current instruction retains its previous value during this state.
The instruction does not change and the instruction register retains its state.
C.2.5.14. Pause-IR State
The Pause-IR state allows the test controller to temporarily halt the shifting of data through the
instruction register. The test data registers selected by the current instruction retain their previous
values during this state.
The instruction does not change and the instruction register retains its state.
The controller remains in this state as long as TMS is held low. When TMS goes high on the rising
edges of TCK, the controller moves to the Exit2-IR state.
C.2.5.15. Exit2-IR State
This is a temporary state. If TMS is held high on the rising edge of TCK, the controller enters the
Update-IR state, which terminates the scanning process. If TMS is held low on the rising edge of
TCK, the controller enters the Shift-IR state.
This test data register selected by the current instruction retains its previous value during this state.
The instruction does not change and the instruction register retains its state.
C.2.5.16. Update-IR State
The instruction shifted into the instruction register is latched onto the parallel output from the
shift-register path on the falling edge of TCK. Once latched, the new instruction becomes the
current instruction. Test data registers selected by the current instruction retain their previous
values.
If TMS is held high on the rising edge of TCK, the controller enters the Select-DR-Scan state. If
TMS is held low on the rising edge of TCK, the controller enters the Run-Test/Idle state.