Intel PXA255 Introduction 1

Intel® PXA255 Processor Developer’s Manual 1-1
Introduction 1
This document applies to the Intel® PXA255 Processor (PXA255 processor). It is an application
specific standard product (ASSP) that provides industry-leading MIPS/mW performance for
handheld computing applications. The processor is a highly integrated system on a chip and
includes a high-performance low-power Intel® XScale™ microarchitecture with a variety of
different system peripherals.
The PXA255 processor is a 17x17mm 256-pin PBGA package config uration fo r high per formanc e.
The 17x17mm package has a 32-bit memory data bu s and the full assortment of peripherals.
1.1 Intel® XScale™ Microarchitecture Features
The Intel® XScale™ microarchitecture provides these features:
•ARM* Architecture Version 5TE ISA compliant.
— ARM* Thumb Instruction Support
— ARM* DSP Enhanced Instructions
•Low power consumption and high performance
•Intel® Media Processing Technology
— Enhanced 16-bit Multiply
— 40-bit Accumulator
•32-KByte Instruction Cache
•32-KByte Data Cache
•2-KByte Mini Data Cache
•2-KByte Mini Instruction Cache
•Instruction and Data Memory Management Units
•Branch Target Buffer
•Debug Capability via JTAG Port
Refer to the Intel® XScale™ Microarchitecture for the Intel® PXA255 Processor User’s Manual
for more details.
1.2 System Integration Features
The processor integrates the Intel® XScale™ microarchitecture with this peripheral set:
•Memory Controller
•Clock and Power Controllers
•Universal Serial Bus Client