TK-260G/270G
CIRCUIT DESCRIPTION
3) UNLOCK DETECTOR
ANT
If a pulse signal appears at the LD pin of IC2, an unlock condition occurs, and the DC voltage obtained form D1, R1, and C6 causes the voltage applied to the microprocessor to go low. When the microprocessor detects this condition, the transmitter is disabled, ignoring the
5C
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DRIVE |
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T/R SW |
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VDD | VGG |
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R56 |
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R57 |
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R58 |
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IC3 | IC3 |
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APC |
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D3
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SW
LPF
IC2 | R1 | IC13 |
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LD |
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PLL IC | C6 | CPU |
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Fig. 6 Unlock detector circuit
4. Transmitter System
1)Microphone amplifier
The signal from the microphone passes through the limitter circuit in D23, and through the
The signal passes through the D/A converter (IC17) for the maximum deviation adjustment, and goes to the VCXO modulation input.
Fig. 8 Drive and final amplifier and APC circuit
3)APC circuit
The APC circuit always monitors the current flowing through the RF power amplifier (IC1) and keeps a constant current. The voltage drop at R56, R57 and R58 is caused by the current flowing through the RF power amplifier and this voltage is applied to the differential amplifier IC3(1/2).
IC3(2/2) compares the output voltage of IC3(1/2) with the reference voltage from IC13, and the output of IC3(2/2) controls the VGG of the RF power amplifier to make both voltages the same.
The change of power high/low is carried out by the change of the reference voltage.
4)Encode signaling
(1) QT/DQT (Low-speed data)
MIC D23
LIMIT
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IC14 | 15 | 16 | 18 | 19 | 9 | 8 |
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HPF | ALC | COMP | LPF | HPF | PRE | IDC | 6 |
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IC17 |
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D/A |
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| LPF |
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| TOVCO |
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| 22 | IC13 | 20 |
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| 2 | 2 TONE | LPF |
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QT,DQT data of the TOTCXO Line is output form pin 20 of the CPU. The signal passes through a
The QT,DQT data of the TOVCO Line is output form pin 22 of the CPU. The signal passes through a low pass CR filter, mixes with the audio signal, and goes to the VCO modulation input. TX deviation is adjusted by the CPU. (See fig.7)
(2) DTMF/2 TONE (High-speed data)
Fig. 7 Microphone amplifier
2)Drive and Final amplifier
The signal from the T/R switch (D5 is on) is amplified by the drive amplifier (Q6) to 50mW.
The output of the drive amplifier is amplified by the RF power amplifier (IC1) to 5.0W (1W when the power is low). The RF power amplifier consists of two MOS FET stages. The output of the RF power amplifier is then passed through the harmonic filter (LPF) and antenna switch (D3 is on) and applied to the antenna terminal.
to the VCO.
TX deviation is adjusted by the CPU. (See fig.7)
5. Power supply
There are five 5V power supplies for the microprocessor: 5V,5M,5C,5R, and 5T. 5V is always output while the power is on. 5M is always output, but turns off when the power is turned off to prevent malfunction of the microprocessor.
5C is a common 5V and is output when SAVE is not set to OFF.
5R is 5V for reception and output during reception.
5T is 5V for transmission and output during transmission.
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