Lincoln Electric NA-5NF, NA-5SF service manual Procedure PC Board Schematic

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G-9 ELECTRICAL DIAGRAMS G-9

PROCEDURE PC BOARD SCHEMATIC

OPTIONAL

OPTIONAL

OPTIONAL

POINTSOURCESUPPLYPOWER

CONNECTIONGROUNDEARTH

L8754

START MODULE

WELD TIMER

MODULE

CRATER MODULE

BURNBACK TIMER

USEDLASTNO.

R-21

C-9

LABELSD-12

NETSUPPLYVOLTAGE

CONNECTIONCOMMON

CONNECTIONFRAME

PROCEDURENA5-

SCHEMATIC

. SHT

. NO

515

5

J19

515

FROM LOGIC

+5V

TIMER BOARD

TIMER BOARD

POWER

SUPPLIES

J19

500

ON LOGIC PCB

500

15

500

655

515

I

O

500

655

515

I

O

-10V

520

3

J19

520

+10V

.

SUP'S'D'G

FROM REF

C1

VOLTAGE ON

18

OPTION BOARD

OPTION BOARD

MFDSPECIFIED)=OTHERWISECAPACITORS(.022/50VUNLESS

PCB

J19 START TIME OVER/WELD TIME INITIATE

INFORMATIONGENERAL

E1537PERSYMBOLSELECTRICAL

Ohms(OTHERWISESPECIFIED)RESISTORS=1/4WUNLESS

OTHERWISESPECIFIED)DIODES=1A,400V(UNLESS

3DBL8754FILE:

.COELECTRICLINCOLNTHE

U.S.A.OHIOCLEVELAND,SUBJECT

SCALE

-91FM10-29CHK.DATE

CONTROL PCB

15V

TIMER BOARD

TIMER BOARD

510P

2

.

J19

EQUIP TYPE

584

583

510P

520

515

562

588A

588

635

562

500

655

632

O

I

515

655

500

584

583

510P

520

515

562

588A

588

635

562

500

655

632

O

I

515

655

500

N.B.

N.C.

7

1

2

3

4

6

8

9

11

12

13

14

15

1

2

3

4

5

6

7

1

2

3

4

6

8

9

11

12

13

14

15

1

2

3

4

5

6

NONE

J11

J11

J11

J11

J11

J11

J11

J11

J11

J11

J11

J11

J11

J9

J9

J9

J9

J9

J9

J10

J10

J10

J10

J10

J10

J10

J10

J10

J10

J10

J10

J10

J8

J8

J8

J8

J8

J8

J19

START TIME INITIATE

520

515

500

515

500

520

515

500

515

500

584S

8

+10V

+5V

-10V

+5V

-10V

+10V

+5V

-10V

+5V

-10V

J18

WELD TIME OVER

565

2

J19

CRATER TIME INITIATE

584C

7

J19

CURRENT

LOGIC

588

9

583S

1

.DR

583C

J19 CRATER TIME OVER/BURNBACK TIME INITIATE

6

566

J18

BURNBACK TIME OVER

3

100 Hz

TIME BASE

1.6384 MHz

OUTPUT

TEST POINT

1

Q12

Vdd

16

2

Q13

OUT2

9

3

Q14

Q8

14

4

Q6

X2

Q9

13

5

Q5

Q10

15

6

Q7

OUT1

10

J19

TO SET

10

632

SPEED BUFFER

7

Q4

CLK

11

R20

ON CONTROL PCB

8

Vss

RES

12

10M

MC14060

R21

7.68K

J19

TO SET

92N-10-7

96N-12-7

1/2W

515

C9

.Ch'geShtNo..

92B-6-3

FOR

11

635

VOLTAGE BUFFER

TIME BASE

Y1

ON VOLTAGE PCB

C2

DIGITAL TIMERS

C3

+5V

22p

1.6384MHz

47p

520

100V

100V

+10V

TOLERANCESPECIFIEDOTHERWISEUNLESS

PERE-2056ONHOLESSIZES IS+.O2ON2PLACEDECIMALS

.OO2DECIMALSIS+ON3PLACE ADEGREEIS+.5OFONALLANGLES

AGREETO("t")TOLERANCEMATERIAL

STANDARDSPUBLISHEDWITH

500

R19

2.21K

R13

R2

8

X1 A

9

3

X1 B

4

R5

VOLTS

R17

R8

11

X1 C

10

2 D X1

1

R11

N.E.

FRAME

-10V

C6

C7

R1

R4

R7

R10

5.62K

5.62K

4.75K

5.62K

5.62K

LED1

LED2

LED3

LED4

4.75K

D1

D2

D3

D4

STRIKE

START

WELD

CRATER

Q1

CW

CW

Q2

CW

CW

WELD

600mA

10K

STRIKE

600mA

10K

40V

2W

10K

40V

2W

10K

VOLTS

D5

D6

D7

D8

STRIKE

N.E.

2W

N.E.

WELD

N.E.

2W

N.E.

SPEED

6

5

SPEED

12

13

J18

STRIKE PROCEDURE

D9

DISABLE

561

1

D10

R14

47.5K

R15

26.7K

R3

267

R6

1.82K

R18

47.5K

R16

26.7K

R9

332

R12

1.82K

LOGIC

J19

STRIKE PROCEDURE

D11

PCB

ENABLE

563

13

STRIKE MODE SETTINGS

WELD MODE SETTINGS

564

14

J19

WELD PROCEDURE ENABLE

515

PROCEDURE KIT

N.D.

+5V

RECEPTACLE

520

J19

564A

4

WELD PROCEDURE ENABLE

+10V

NOTES :

START

WELD

J18

581

4

START DISABLE

16

N.A.

SINCE COMPONENTS OR CIRCUITRY ON A PRINTED CIRCUIT BOARD MAY CHANGE

STRIKE

STRIKE

5 CRATER

WITHOUT AFFECTING THE INTERCHANGEABILITY OF A COMPLETE BOARD, THIS DIAGRAM MAY

8

9

10

11

2

3

4

14

NOT SHOW THE EXACT COMPONENTS OR CIRCUITRY OF CONTROLS HAVING A COMMON CODE

S1 A

S1 B

C4

X2

C8

NUMBER.

X1

C5

N.B. A JUMPER PLUG CONNECTS 584S TO 583S WHEN THE OPTIONAL START MODULE IS

L

LOGIC

MC14060

4.7

NOT INSTALLED.

PCB

PRESET MODE

35V

8754

581A

5

J18

START DISABLE

C2

C1

4066B

N.C.

A JUMPER PLUG CONNECTS 584C TO 583C WHEN THE OPTIONAL START MODULE IS

SELECTOR

TO PIN P8.

8

NOT INSTALLED. ALSO, LOGIC CIRCUIT 694 LEAD MUST BE MOVED FROM PIN P10

D12

N.E.

7

N.D.

564

IS CONNECTED TO 564A BY A LEAD RECEPTACLE JUMPER PLUG, WHICH IS

J18

PRESET MONITOR ENABLE

560

6

REMOVED WHEN THE OPTIONAL MULTI-PROCEDURE KIT IS INSTALLED.

N.E. R2, R5, R8, R11 AND S1 ARE CONNECTED TO FRAME BY PCB TRACES AND MOUNTING

POWER SUPPLY DISTRIBUTION

500

SCREW, FOR ESD.

AND BYPASSING

-10V

NOTE: Lincoln Electric assumes no responsibility for liablilities resulting from board level troubleshooting. PC Board repairs will invalidate your factory warranty. Individual Printed Circuit Board Components are not avail-
able from Lincoln Electric. This information is provided for reference only. Lincoln Electric discourages board level troubleshooting and repair since it may compromise the quality of the design and may result in	NA-5
danger to the Machine Operator or Technician. Improper PC board repairs could result in damage to the machine.