B.3 TLA7BB4 Module to module skew..................................................................................
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APPENDIX C – 240-pin DDR3 DIMM Pinout ...........................................................................
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APPENDIX D –Data Flow Through the Probes (coax cable to channel) ....................................
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APPENDIX E – B_DDR3D_2D Support Pinout, DIMM Slot 0..................................................
80
APPENDIX F – B_DDR3_2G Support Pinout, DIMM Slot 0 Auxiliary Signals .......................
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APPENDIX G – B_DDR3D_3A Support Pinout, DIMM Slot 1 .................................................
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APPENDIX H – Data Group / Data Byte / Strobe Cross-Reference............................................
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APPENDIX I – NEX-DDR3INTR-THIN Silkscreen...................................................................
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APPENDIX J – Keep out area......................................................................................................
88
APPENDIX K – Simulation Model..............................................................................................
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APPENDIX L - References ..........................................................................................................
90
APPENDIX M - Support ..............................................................................................................
91
DDR3THIN-MN-XXX
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