To change the display it is necessary to bring up the window’s Properties window (perform a right
Figure 17 - Disassembly Properties
There are several select fields available in this window, some of which must be set correctly for the
Burst Length - permits setting the burst length for Read and Write data. Valid choices are 4 (the default) 8, and 4/8
CAS Latency (CL) - sets the delay, in clock cycles, from the Read command until the first piece of valid Read data is available. This value must be set properly for all valid Read Data to be displayed. Valid choices are 5 (default), 6, 7, 8, 9 or 10 cycles.
CAS Additive Latency - additional latency for data cycles. This value must also be set properly for valid Read Data to be displayed. Valid choices are 0 (default),
CAS Write Latency – number of clock cycles from Write command to the first Write Data. This value must be set properly for all valid Write Data to be displayed. Valid choices are 5 (default), 6, 7, or 8 cycles.
Registered? – must be set to reflect whether or not Registered DDR memory is used. Default is No. When set to Yes an additional clock cycle delay is added to CAS Latency and to valid Read and Write Data tagging.
64 | Doc. Rev. 1.11 |