Page474 of 544 NTAK102.0 MbDTI c ard
553-3011-100 Standard14.00 January 2002
Rx Direction
The AMI data of the carrier is converted to digital and fed to the input selector
as well as the output selector for far end loopback. Clock recovery circuitry
within the receiving device extracts the 2.0 MHz clock. This clock is used to
generate the frame and multiframe count and is sent to the clock controller as
a reference.
Clock controller interface
The recovered clock from the external digital facility is provided to the clock
controller through the backplane-to-clock controller interface. Depending
upon the state of the clock controller (switched on or off), the clock controller
interface will, in conjunction with software, enable or disable the appropriate
reference clock source.
The clock-controller circuitry on NTAK10 is identical to that of the
NTAK20. Note that while several DTI/PRI packs may exist in one system,
only one clock controller may be activated (all other DTI/PRI clock
controllers must be switched off).
Clocking modes
The clock controller can operate in one of two modes: tracking or non-
tracking (also known as free-run).
Tracking mode
There are two stages to clock controller tracking:
•tracking a reference, and
•locked onto a reference.
When tracking a reference, the clock controller uses an algorithm to match its
frequency to the frequency of the incoming clock. When the frequencies are
very near to being matched, the clock controller is locked onto the reference.
The clock controller will make small adjustments to its own frequency until
both the incoming and system frequencies correspond.