Page522 of 544 NTBK51Downloadable D-channel handler
553-3011-100 Standard14.00 January 2002
The microprocessor performs the following functions:
•Sanity check and self tests
•Message handling between the Option 11C and the card
•Four port serial communication controller handling with DMA
•Program download from Option 11C CPU
Main Memory
The main 68EC020 system memory is comprised of 1 Mbyte of SRAM and
may be accessed in either 8 or 16 bits. The software, base code and
application, resides in main RAM and is downloaded from software through
the shared memory.
Shared Memory
The shared memory is the interface between the Option 11C CPU and the
68EC020 MPU. This memory is a 16 Kbyte RAM, expandable to 64 Kbytes
and accessible in either 8 or 16 bits.
EPROM Memory
The Bootstrap code resides in this 27C1000 EPROM and is executed on
power up or reset.
Flash EPROM Memory
Flash EPROM provides non volatile storage for the DDCH loadware which
will minimize the impact to sysload. The Flash EPROM, in reference to
current devices, provides an increase in system service with a reduced delay
after a brown-out and faster testing of a hardware pack after it is plugged in.
EEPROM Memory
The DDCH uses a 1,024 bit serial EEPROM for storing the NT product code
and a revision level. This information can be queried by software.