Page46 of 544 Memory,Storage and CPU capacity
553-3011-100 Standard14.00 January 2002
Note 18
The DCH application supports both 1.5 Mbit PRI and 2.0 Mbit PRI2.
527 per system
197 + 2 x M
Where:
M is computed as follows for each DCHI, depending on Mode:
PRA Mode:
If PRI is defined:
M = NChan * (nn + 1)
If PRI is NOT defined:
M = NChan * [1 (for primary channel)
+ 1 (if backup channel is on)]
Where:
nn = Highest Loop Interface Id (defined in Ovl17 by PRI lll nn), and
NChan = 24 for PRI and 31 for PRI2.
ISL Mode:
M = maximum number of ISL trunks defined.
Shared Mode:
M is the sum of the values for PRA and ISL Mode.
PRI2 only:
Unprotected data block = 68 words