Page466 of 544 NTRB21DTI /PRI/DCHTMDI card
553-3011-100 Standard14.00 January 2002
Clock rate converter
The 1.5 Mb clock is generated by a phase-locked loop (PLL). The PLL
synchronizes the 1.5 Mb DS1 clock to the 2.56 Mb system clock through the
common multiple of 8 kHz by using the main frame synchronization signal.