Page496 of 544 NTBK502.0 MbPRI c ard
553-3011-100 Standard14.00 January 2002
Power requirements
The NTBK50 obtains its power from the backplane, drawing maximums of
2amps on +5 V, 35 mA on +15 V and 20 mA on -15 V.
Environment
The NTBK50 meets all applicable Nortel Networks operating specifications.
Architecture
The main functional blocks of the NTBK50 architecture include:
DS-30X interface
A07 signaling interface
digital pad
carrier interface
CEPT transceiver
SLIP control
D-channel support interface
Flashing (Green) NTAK20 is equipped and is attempting to lock
(tracking mode) to a reference. If the LED flashes
continuously over an extended period of time, check
the CC STAT in LD60. If the CC is tracking this may
be an acceptable state. Check for slips and related
clock controller error conditions. If none exist, then
this state is acceptable, and the flashing is
identifying jitter on the reference.
Off The clock controller is not equipped.
DCH On (Red) DCH is disabled.
On (Green) DCH is enabled, but not necessarily established.
Off DCH is not equipped.
Table 1 53
NTBK50 faceplate LEDs (Part2 of 2)
LED State Definition