Samsung S3C9228/P9228, 8-Bit CMOS Microcontroller Port 3 Interrupt Control Register P3INT

I/O PORTS S3C9228/P9228

Port 3 Interrupt Control Register (P3INT)

F7H, Page 0, R/W

MSB .7 .6 .5 .4 .3 .2 .1 .0

LSB

Not used P3.1 P3.0

(INTP) (INTP)

P3INT bit configuration settings:

0

1

Disable interrupt

Enable interrupt

Figure 9-15. Port 3 Interrupt Control Register (P3INT)

Port 3 Interrupt Pending Bits (INTPND2.5-.4)

D7H, Page 0, R/W

MSB

.7

.6

.5

.4

.3

.2

.1

.0

LSB

Not used

P3.0 (INTP)

SIO

Timer 1/A

P3.0 (INTP) Watch Timer Timer B

INTPND2 bit configuration settings:

0

1

No interrupt pending (when read), clear pending bit (when write) Interrupt is pending (when read)

Figure 9-16. Port 3 Interrupt Pending Bits (INTPND2.5-.4)

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