Samsung S3C9228/P9228, 8-Bit CMOS Microcontroller user manual Timer B Control Register Tbcon

TIMER 1

S3C9228/P9228

Timer B Control Register (TBCON)

BAH, R/W

MSB

.7

.6

.5

.4

.3

.2

.1

.0

LSB

Not used

Not used

Timer B clock selection bits:

Timer B match interrupt enable bit:

0 = Disable match interrupt

000

= fxx/512

1 = Enable match interrupt

001

= fxx/256

010

= fxx/64

011

= fxx/8

Timer B count enable bit:

100

= fxx (system clock)

0 = Disable counting operating

101

= fxt (sub clock)

1 = Enable counting operating

110

= Not available

111

= Not available

Timer B counter clear bit:

0 = No effect

1 = Clear the timer B counter (when write)

Figure 11-4. Timer B Control Register (TBCON)

11-6